Single D-type flip-flop with set and reset; positive edge trigger

文件：104.37 Kbytes 页数：19 Pages

恩XP

Single D-type flip-flop with set and reset; positive edge trigger

文件：123.84 Kbytes 页数：21 Pages

恩XP

Single D-type flip-flop with set and reset; positive edge trigger

文件：104.37 Kbytes 页数：19 Pages

恩XP

Single D-type flip-flop with set and reset; positive edge trigger

文件：123.84 Kbytes 页数：21 Pages

恩XP

Single D-type flip-flop with set and reset; positive edge trigger

文件：100.55 Kbytes 页数：20 Pages

PHI

PHI

Single D-type flip-flop with set and reset; positive edge trigger

文件：231.09 Kbytes 页数：15 Pages

NEXPERIA

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Single D-type flip-flop with set and reset; positive-edge trigger

The 74LVC2G74-Q100 is a single positive-edge triggered D-type flip-flop. It has individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs.\n This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry dis • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Wide supply voltage range from 1.65 V to 5.5 V\n• 5 V tolerant inputs for interfacing with 5 V logic\n• High noise immunity\n• Complies with JEDEC standard:• JESD;

Nexperia

安世

Single D-type flip-flop with set and reset; positive-edge trigger

The 74LVC2G74-Q100 is a single positive-edge triggered D-type flip-flop. It has individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs.\n This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry dis • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Wide supply voltage range from 1.65 V to 5.5 V\n• 5 V tolerant inputs for interfacing with 5 V logic\n• High noise immunity\n• Complies with JEDEC standard:• JESD;

Nexperia

安世

Single D-type flip-flop with set and reset; positive edge trigger

The 74LVC2G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the f

Nexperia

安世

Package：8-VFSOP（0.091"，2.30mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 功能：设置（预设）和复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 1BIT 8VSSOP

Nexperia USA Inc.