Low-power configurable multiple function gate

General description The 74LVC1G58 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XOR, inverter and buffer. All inputs can be connected to VCC or GND. The three inputs (A, B

文件：100.93 Kbytes 页数：18 Pages

恩XP

Low-power configurable multiple function gate

General description The 74LVC1G58 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment

文件：100.61 Kbytes 页数：18 Pages

PHI

PHI

Low-power configurable multiple function gate

General description The 74LVC1G58 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XOR, inverter and buffer. All inputs can be connected to VCC or GND. The three inputs (A, B

文件：100.93 Kbytes 页数：18 Pages

恩XP

丝印：YK；Package：SOT886；Low-power configurable multiple function gate

1. General description The 74LVC1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer; using the 3-bit input. All inputs can be connected diectly to VCC or GND.

文件：271.51 Kbytes 页数：18 Pages

NEXPERIA

安世

丝印：YK；Package：SOT1115；Low-power configurable multiple function gate

1. General description The 74LVC1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer; using the 3-bit input. All inputs can be connected diectly to VCC or GND.

文件：271.51 Kbytes 页数：18 Pages

NEXPERIA

安世

丝印：YK；Package：SOT1202；Low-power configurable multiple function gate

1. General description The 74LVC1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer; using the 3-bit input. All inputs can be connected diectly to VCC or GND.

文件：271.51 Kbytes 页数：18 Pages

NEXPERIA

安世

丝印：Y58；Package：SOT457；Low-power configurable multiple function gate

1. General description The 74LVC1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer; using the 3-bit input. All inputs can be connected diectly to VCC or GND.

文件：271.51 Kbytes 页数：18 Pages

NEXPERIA

安世

Low-power configurable multiple function gate

General description The 74LVC1G58 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment

文件：100.61 Kbytes 页数：18 Pages

PHI

PHI

Low-power configurable multiple function gate

General description The 74LVC1G58 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XOR, inverter and buffer. All inputs can be connected to VCC or GND. The three inputs (A, B

文件：100.93 Kbytes 页数：18 Pages

恩XP

Low-power configurable multiple function gate

General description The 74LVC1G58 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment

文件：100.61 Kbytes 页数：18 Pages

PHI

PHI