1. General description

The 74LVC1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The device

can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter

and buffer; using the 3-bit input. All inputs can be connected diectly to VCC or GND. Inputs can be

driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators

in mixed 3.3 V and 5 V environments.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry

disables the output, preventing the potentially damaging backflow current through the device when

it is powered down.

2. Features and benefits

• Wide supply voltage range from 1.65 V to 5.5 V

• High noise immunity

• ±24 mA output drive (VCC = 3.0 V)

• CMOS low power dissipation

• IOFF circuitry provides partial Power-down mode operation

• Latch-up performance exceeds 250 mA

• Direct interface with TTL levels

• Overvoltage tolerant inputs to 5.5 V

• Complies with JEDEC standard:

• JESD8-7 (1.65 V to 1.95 V)

• JESD8-5 (2.3 V to 2.7 V)

• JESD8C (2.7 V to 3.6 V)

• JESD36 (4.5 V to 5.5 V)

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V.

• Multiple package options

• Specified from -40 °C to +85 °C and -40 °C to +125 °C.

74LVC1G58GS属于集成电路（IC） > 门和反相器 - 多功能，可配置。安世半导体(中国)有限公司制造生产的74LVC1G58GS门和反相器 - 多功能，可配置可配置逻辑栅极系列产品能以与标准逻辑栅极类似的方式，对单个逻辑信号执行基本逻辑运算，但并非局限于一个特定功能（例如 AND、NAND 等）。它们通常在内部使用少量逻辑门来实现，经过选择和互连后，以便通过选择操作数据所应用的输入以及任何未使用的输入在驱动后的逻辑状态，来配置所实现的整体逻辑功能。