SINGLE SCHMITT-TRIGGER INVERETER

Description The 74LVC1G14 is a single 1-input Schmitt-trigger inverter with a standard push-pull output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is f

文件：273.73 Kbytes 页数：14 Pages

DIODES

美台半导体

丝印：UP；Package：X2-DFN1410-6；SINGLE SCHMITT-TRIGGER INVERETER

Description The 74LVC1G14 is a single 1-input Schmitt-trigger inverter with a standard push-pull output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is f

文件：273.73 Kbytes 页数：14 Pages

DIODES

美台半导体

Single Schmitt-trigger inverter

DESCRIPTION The 74LVC1G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmi

文件：368.48 Kbytes 页数：20 Pages

PHI

飞利浦

Single Schmitt-trigger inverter

General description The 74LVC1G14 provides the inverting buffer function with Schmitt-trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use

文件：99.12 Kbytes 页数：16 Pages

恩XP

丝印：VF；Package：SOT886；Single Schmitt-trigger inverter

1. General description The 74LVC1G14 is a single inverter with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down ap

文件：290.39 Kbytes 页数：19 Pages

NEXPERIA

安世

Single Schmitt-trigger inverter

DESCRIPTION The 74LVC1G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmi

文件：368.48 Kbytes 页数：20 Pages

PHI

飞利浦

Single Schmitt-trigger inverter

General description The 74LVC1G14 provides the inverting buffer function with Schmitt-trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use

文件：99.12 Kbytes 页数：16 Pages

恩XP

Single Schmitt-trigger inverter

DESCRIPTION The 74LVC1G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmi

文件：100.1 Kbytes 页数：17 Pages

PHI

飞利浦

丝印：VF；Package：XSON6；Single Schmitt trigger inverter

1. General description The 74LVC1G14-Q100 is a single inverter with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power do

文件：280.68 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：VF；Package：XSON6；Single Schmitt trigger inverter

1. General description The 74LVC1G14-Q100 is a single inverter with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power do

文件：253.79 Kbytes 页数：15 Pages

NEXPERIA

安世