Bus buffer/line driver; 3-state

DESCRIPTION The 74LVC1G126 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of this device in a mixed 3.3 and 5 V environment. FEATURES

文件：94.57 Kbytes 页数：17 Pages

PHI

PHI

SINGLE BUFFER GATE WITH 3-STATE OUTPUT

Description The 74LVC1G126 is a single, non-inverting buffer/bus driver with a 3-state output. The output enters a high-impedance state when a LOW level is applied to the output enable (OE) pin. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolera

文件：268.16 Kbytes 页数：14 Pages

DIODES

美台半导体

Bus buffer/line driver; 3-state

General description The 74LVC1G126 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A LOW-level at pin OE causes the output to assume a high-impedance OFF-state. The input can be driven from either 3.3 V or 5 V d

文件：90.03 Kbytes 页数：16 Pages

恩XP

Bus buffer/line driver; 3-state

1. General description The 74LVC1G126 is a single buffer/line driver with 3-state output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circui

文件：272.84 Kbytes 页数：18 Pages

NEXPERIA

安世

SINGLE BUFFER GATE WITH 3-STATE OUTPUT

Features «Supply Voltage Range from 20V to 5.5V + +8mA Output Drive at 5.0V. + CMOS low power consumption «Schmitt Trigger Action at All Inputs Make the Circuit Tolerant for Slower Input Rise and Fall Time + ESD Protection per JESD 22 o Exceeds 200-V Machine Model (A115-A) 0 Exceeds

文件：2.93125 Mbytes 页数：7 Pages

TECHPUBLIC

台舟电子

Bus buffer/line driver; 3-state

文件：98.48 Kbytes 页数：16 Pages

恩XP

Single-gate

The 74LVC1G126 is a single non-inverting buffer/bus driver with a 3-state output. The output enters a high impedance state when a LOW-level is applied to the output enable (OE) pin. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allow •Wide Supply Voltage Range from 1.65 to 5.5V\n•± 24mA Output Drive at 3.3V\n•CMOS low power consumption\n•IOFF Supports Partial-Power-Down Mode Operation\n•Inputs accept up to 5.5V\n•ESD Protection Exceeds JESD 22\n•200-V Machine Model (A115-A)\n•2000-V Human Body Model (A114-A)\n•1000-V Charged-Dev;

Diodes

美台半导体

丝印：C26F；Package：SOT-23(DBV)；SN74LVC1G126 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Inse

文件：2.16506 Mbytes 页数：40 Pages

TI

德州仪器

丝印：C26F；Package：SOT-23(DBV)；SN74LVC1G126 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Inse

文件：2.16506 Mbytes 页数：40 Pages

TI

德州仪器

丝印：C26F；Package：SOT-23；SN74LVC1G126 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Inse

文件：2.14108 Mbytes 页数：37 Pages

TI

德州仪器