Single 3-Input Positive-NAND Gate

文件：1.29547 Mbytes 页数：25 Pages

TI

德州仪器

丝印：TU***；Package：SOT-363；SINGLE 3 INPUT POSITIVE NAND GATE

文件：314.49 Kbytes 页数：13 Pages

DIODES

美台半导体

SINGLE 3 INPUT POSITIVE NAND GATE

文件：314.49 Kbytes 页数：13 Pages

DIODES

美台半导体

SINGLE 3 INPUT POSITIVE NAND GATE

文件：314.49 Kbytes 页数：13 Pages

DIODES

美台半导体

SINGLE 3 INPUT POSITIVE NAND GATE

文件：314.49 Kbytes 页数：13 Pages

DIODES

美台半导体

丝印：YM；Package：SC-88；Single 3-input NAND gate

文件：764.55 Kbytes 页数：12 Pages

NEXPERIA

安世

Single 3-input NAND gate

文件：764.55 Kbytes 页数：12 Pages

NEXPERIA

安世

丝印：TU***；Package：SOT-26；SINGLE 3 INPUT POSITIVE NAND GATE

文件：314.49 Kbytes 页数：13 Pages

DIODES

美台半导体

SINGLE 3 INPUT POSITIVE NAND GATE

文件：314.49 Kbytes 页数：13 Pages

DIODES

美台半导体

Single 3-input NAND gate

The 74LVC1G10 provides a low-power, low-voltage single 3-input NAND gate.\n The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.\n Schmitt trigger action at all inputs makes the circuit tolerant to slower in • Wide supply voltage range from 1.65 V to 5.5 V\n• High noise immunity\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 V to 2.7 V)\n• JESD8-B/JESD36 (2.7 V to 3.6 V).\n\n• ±24 mA output drive (VCC = 3.0 V)\n• CMOS low power consumption\n• Latch-up performance exceeds 25;

Nexperia

安世