Dual decade ripple counter

GENERAL DESCRIPTION The 74HC/HCT390 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Two BCD decade or bi-quinary counters • One package can be configured to divide-

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飞利浦

DUAL DECADE RIPPLE COUNTER

DUAL DECADE RIPPLE COUNTER

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Dual decade ripple counter

1. General description The 74HC390; 74HCT390 is a dual 4-bit decade ripple counter divided into four separately clocked sections. The counters have two divide-by-2 sections and two divide-by-5 sections. These sections share an asynchronous master reset input (nMR) and can be used in a BCD decad

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Dual decade ripple counter

1. General description The 74HC390; 74HCT390 is a dual 4-bit decade ripple counter divided into four separately clocked sections. The counters have two divide-by-2 sections and two divide-by-5 sections. These sections share an asynchronous master reset input (nMR) and can be used in a BCD decad

文件：257.81 Kbytes 页数：15 Pages

NEXPERIA

安世

Dual decade ripple counter

GENERAL DESCRIPTION The 74HC/HCT390 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Two BCD decade or bi-quinary counters • One package can be configured to divide-

文件：49.22 Kbytes 页数：7 Pages

PHI

飞利浦

Dual decade ripple counter

GENERAL DESCRIPTION The 74HC/HCT390 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Two BCD decade or bi-quinary counters • One package can be configured to divide-

文件：49.22 Kbytes 页数：7 Pages

PHI

飞利浦

Dual decade ripple counter

GENERAL DESCRIPTION The 74HC/HCT390 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Two BCD decade or bi-quinary counters • One package can be configured to divide-

文件：49.22 Kbytes 页数：7 Pages

PHI

飞利浦

Dual decade ripple counter

GENERAL DESCRIPTION The 74HC/HCT390 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Two BCD decade or bi-quinary counters • One package can be configured to divide-

文件：49.22 Kbytes 页数：7 Pages

PHI

飞利浦

Dual decade ripple counter

1. General description The 74HC390; 74HCT390 is a dual 4-bit decade ripple counter divided into four separately clocked sections. The counters have two divide-by-2 sections and two divide-by-5 sections. These sections share an asynchronous master reset input (nMR) and can be used in a BCD decad

文件：257.81 Kbytes 页数：15 Pages

NEXPERIA

安世

Dual decade ripple counter

The 74HC390; 74HCT390 is a dual 4-bit decade ripple counter divided into four separately clocked sections. The counters have two divide-by-2 sections and two divide-by-5 sections. These sections share an asynchronous master reset input (nMR) and can be used in a BCD decade or bi-quinary configuratio • Input levels:• For 74HC390: CMOS level\n• For 74HCT390: TTL level\n\n• Two BCD decade or bi-quinary counters\n• One device can be configured to divide-by-2, 4, 5, 10, 20, 25, 50 or 100y\n• Two master reset inputs to clear each decade counter individually\n• Specified in compliance with JEDEC stand;

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