Quad buffer/line driver; 3-state

GENERAL DESCRIPTION The 74HC/HCT126 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: bus driver • ICCcategory: MSI

文件：40.92 Kbytes 页数：6 Pages

PHI

飞利浦

QUADRUPLE 3-STATE BUFFERS OE HIGH

Description The 74HCT126 provides provides four independent buffer gates with 3-state outputs. Each buffer has a separate enable pin that if driven with a low logic level places the corresponding output in the high impedance state. The device is designed for operation with a power supply range of

文件：306.58 Kbytes 页数：8 Pages

DIODES

美台半导体

Quad buffer/line driver; 3-state

1. General description The 74HC126; 74HCT126 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A LOW on nOE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to i

文件：244.93 Kbytes 页数：13 Pages

NEXPERIA

安世

Standard-logic

The 74AHCT126 provides provides four independent buffer gates\nwith 3-state outputs. Each buffer has a separate enable pin that if\ndriven with a low logic level places the corresponding output in the\nhigh impedance state. The device is designed for operation with a\npower supply range of 4.5V to 5

Diodes

美台半导体

Quad buffer/line driver; 3-state

1. General description The 74HC126; 74HCT126 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A LOW on nOE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to i

文件：244.93 Kbytes 页数：13 Pages

NEXPERIA

安世

Quad buffer/line driver; 3-state

GENERAL DESCRIPTION The 74HC/HCT126 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: bus driver • ICCcategory: MSI

文件：40.92 Kbytes 页数：6 Pages

PHI

飞利浦

Quad buffer/line driver; 3-state

GENERAL DESCRIPTION The 74HC/HCT126 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: bus driver • ICCcategory: MSI

文件：40.92 Kbytes 页数：6 Pages

PHI

飞利浦

Quad buffer/line driver; 3-state

GENERAL DESCRIPTION The 74HC/HCT126 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: bus driver • ICCcategory: MSI

文件：40.92 Kbytes 页数：6 Pages

PHI

飞利浦

Quad buffer/line driver; 3-state

1. General description The 74HC126; 74HCT126 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A LOW on nOE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to i

文件：244.93 Kbytes 页数：13 Pages

NEXPERIA

安世

Quad buffer/line driver; 3-state

GENERAL DESCRIPTION The 74HC/HCT126 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: bus driver • ICCcategory: MSI

文件：40.92 Kbytes 页数：6 Pages

PHI

飞利浦