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74HCT109PW-Q100

Dual JK flip-flop with set and reset; positive-edge-trigger

1. General description The 74HC109-Q100; 74HCT109-Q100 is a dual positive edge triggered JK flip-flop featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and

文件:257.709 Kbytes 页数:16 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HCT109-Q100

Dual JK flip-flop with set and reset; positive-edge-trigger

1. General description The 74HC109-Q100; 74HCT109-Q100 is a dual positive edge triggered JK flip-flop featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and

文件:257.709 Kbytes 页数:16 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HCT10D

Triple 3-input NAND gate

1. General description The 74HC10; 74HCT10 is a triple 3-input NAND gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Complies with JEDEC standard JESD7A • Input levels: • For74HC10

文件:224.64 Kbytes 页数:11 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HCT10D

Triple 3-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT10 provide the 3-input NAND function. FEATURES • Output capability: standard • ICC categ

文件:34.29 Kbytes 页数:5 Pages

PHI

飞利浦

PHI

74HCT10DB

Triple 3-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT10 provide the 3-input NAND function. FEATURES • Output capability: standard • ICC categ

文件:34.29 Kbytes 页数:5 Pages

PHI

飞利浦

PHI

74HCT10D-Q100

Triple 3-input NAND gate

1. General description The 74HC10-Q100; 74HCT10-Q100 is a triple 3-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) stand

文件:223.95 Kbytes 页数:11 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HCT10N

Triple 3-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT10 provide the 3-input NAND function. FEATURES • Output capability: standard • ICC categ

文件:34.29 Kbytes 页数:5 Pages

PHI

飞利浦

PHI

74HCT10PW

Triple 3-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT10 provide the 3-input NAND function. FEATURES • Output capability: standard • ICC categ

文件:34.29 Kbytes 页数:5 Pages

PHI

飞利浦

PHI

74HCT10PW

Triple 3-input NAND gate

1. General description The 74HC10; 74HCT10 is a triple 3-input NAND gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Complies with JEDEC standard JESD7A • Input levels: • For74HC10

文件:224.64 Kbytes 页数:11 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HCT10PW-Q100

Triple 3-input NAND gate

1. General description The 74HC10-Q100; 74HCT10-Q100 is a triple 3-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) stand

文件:223.95 Kbytes 页数:11 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

技术参数

  • VCC (V):

    4.5 - 5.5

  • Logic switching levels:

    TTL

  • Output drive capability (mA):

    ± 4

  • tpd (ns):

    16

  • fmax (MHz):

    73

  • Power dissipation considerations:

    low

  • Tamb (°C):

    -40~125

  • Rth(j-a) (K/W):

    87

  • Ψth(j-top) (K/W):

    6.5

  • Rth(j-c) (K/W):

    45

  • Package name:

    SO14

供应商型号品牌批号封装库存备注价格
PHIL
24+/25+
2151
原装正品现货库存价优
询价
HAR
24+
SOP
178
询价
PHI
25+
3.9
2987
只售原装自家现货!诚信经营!欢迎来电!
询价
STM
23+
SMD-SO14
9856
原装正品,假一罚百!
询价
ST
23+
SO14
30000
代理全新原装现货,价格优势
询价
PHI
2023+环保现货
SSOP
4425
专注军工、汽车、医疗、工业等方案配套一站式服务
询价
PHI
23+
3.9mm
3880
正品原装货价格低
询价
恩XP
2016+
DIP
3605
只做原装,假一罚十,公司可开17%增值税发票!
询价
HAR
05+
原厂原装
10051
只做全新原装真实现货供应
询价
ph
24+
N/A
6980
原装现货,可开13%税票
询价
更多74HCT10供应商 更新时间2025-10-4 9:10:00