Quad 2-input NOR gate

GENERAL DESCRIPTION The 74HC/HCT02 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT02 provide the 2-input NOR function. FEATURES • Output capability: standard

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PHI

PHI

Quad 2-input NOR gate

GENERAL DESCRIPTION The 74HC/HCT02 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT02 provide the 2-input NOR function. FEATURES • Output capability: standard

文件：28.8 Kbytes 页数：5 Pages

PHI

PHI

Quad 2-input NOR gate

General description The 74HC02; 74HCT02 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC02; 74HCT02 provides a quad 2-input NOR function. Features and benefits ■ Input levels: ◆ For 74HC02: CMO

文件：100.08 Kbytes 页数：15 Pages

恩XP

Quad 2-input NOR gate

1. General description The 74HC02; 74HCT02 is a quad 2-input NOR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • CMOS low power di

文件：265.75 Kbytes 页数：14 Pages

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安世

Quad 2-input NAND gate; open-drain output

1. General description The 74HC03; 74HCT03 is a quad 2-input NAND gate with open-drain outputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.

文件：226.43 Kbytes 页数：11 Pages

NEXPERIA

安世

Quad 2-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT03 provide the 2-input NAND function The 74HC/HCT03 have open-drain N-transistor outputs

文件：55.97 Kbytes 页数：8 Pages

PHI

PHI

Quad 2-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT03 provide the 2-input NAND function The 74HC/HCT03 have open-drain N-transistor outputs

文件：55.97 Kbytes 页数：8 Pages

PHI

PHI

Quad 2-input NAND gate; open-drain output

1. General description The 74HC03; 74HCT03 is a quad 2-input NAND gate with open-drain outputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.

文件：226.43 Kbytes 页数：11 Pages

NEXPERIA

安世

Quad 2-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT03 provide the 2-input NAND function The 74HC/HCT03 have open-drain N-transistor outputs

文件：55.97 Kbytes 页数：8 Pages

PHI

PHI

Quad 2-input NAND gate; open-drain output

1. General description The 74HC03; 74HCT03 is a quad 2-input NAND gate with open-drain outputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.

文件：226.43 Kbytes 页数：11 Pages

NEXPERIA

安世