Octal D-type transparent latch; 3-state

GENERAL DESCRIPTION The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inputs and outputs on opposite sides of package allowing easy interface with microp

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PHI

飞利浦

Octal D-type transparent latch 3-state

GENERAL DESCRIPTION The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inputs and outputs on opposite sides of package allowing easy interface with microp

文件：158.64 Kbytes 页数：21 Pages

PHI

飞利浦

Octal 3-State Noninverting Transparent Latch(High-Performance Silicon-Gate CMOS)

The SL74HC573 is identical in pinout to the LS/ALS573. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When

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SLS

Octal D-type transparent latch; 3-state

1. General description The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will

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NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：74HC573D；Package：SOIC20；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • Octal D-Type Latch with 3-State Outputs General The 74HC573D is a high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power diss

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TOSHIBA

东芝

Octal D-Type Transparent Latch with 3-State Outputs

The 74HC573 is an 8-bit D-type transparent latch with 3-state outputs that is designed for 2.0V to 5.5V VCC operation. The device can be used for driving loads with high capacitance or relatively low-impedance, making it suitable for applications in buffer registers, I/O ports, bidirectional bus dri ● Wide Supply Voltage Range: 2.0V to 5.5V\n● +7.8mA/-7.8mA Output Current\n● 8-Bit D-Type Transparent Latch\n● CMOS Low Power Consumption\n● 3-State Non-Inverting Outputs Suitable for Bus-Oriented Applications\n● -40℃ to +125℃ Operating Temperature Range\n● Available in Green SOIC-20 and TSSOP-20 Pa;

SGMICRO

圣邦股份

74系列 逻辑芯片

HGSEMI

华冠

8 位三态输出 D 型锁存器

Sungine

双竞

Octal D-type transparent latch; 3-state

1. General description The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will

文件：279.1 Kbytes 页数：16 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Octal D-type transparent latch; 3-state

1. General description The 74HC573-Q100; 74HCT573-Q100 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch ou

文件：274.77 Kbytes 页数：16 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司