丝印：74HC4053D；Package：SOIC16；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • Triple 2-Channel Analog Multiplexer/Demultiplexer General The 74HC4053D are high speed CMOS ANALOG MULTIPLEXER/DEMULTIPLEXER fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low

文件：257.579 Kbytes 页数：13 Pages

TOSHIBA

东芝

Triple 2-channel analog multiplexer/demultiplexer

General description The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A.

文件：176.73 Kbytes 页数：33 Pages

PHI

飞利浦

Triple 2-channel analog multiplexer/demultiplexer

1. General description The 74HC4053; 74HCT4053 is a triple single-pole double-throw analog switch (3x SPDT) suitable for use in analog or digital 2:1 multiplexer/demultiplexer applications. Each switch features a digital select input (Sn), two independent inputs/outputs (nY0 and nY1) and a comm

文件：403.86 Kbytes 页数：27 Pages

NEXPERIA

安世

Triple 2-channel analog multiplexer/demultiplexer

General description The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A. The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a common enable input (E). Each mul

文件：224.63 Kbytes 页数：32 Pages

恩XP

Triple 2-channel analog multiplexer/demultiplexer

文件：226.58 Kbytes 页数：32 Pages

恩XP

Triple 2-channel analog multiplexer/demultiplexer

文件：226.58 Kbytes 页数：32 Pages

恩XP

Triple 2-channel analog multiplexer/demultiplexer

General description The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A.

文件：176.73 Kbytes 页数：33 Pages

PHI

飞利浦

Triple 2-channel analog multiplexer/demultiplexer

General description The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A. The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a common enable input (E). Each mul

文件：224.63 Kbytes 页数：32 Pages

恩XP

Triple 2-channel analog multiplexer/demultiplexer

General description The 74HC4053-Q100; 74HCT4053-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. Features and benefits ■ Automotive product qualification in accordance with AEC-Q100 (Gr

文件：320.63 Kbytes 页数：30 Pages

恩XP

Triple 2-channel analog multiplexer/demultiplexer

1. General description The 74HC4053-Q100; 74HCT4053-Q100 is a triple single-pole double-throw analog switch (3x SPDT) suitable for use in analog or digital 2:1 multiplexer/demultiplexer applications. Each switch features a digital select input (Sn), two independent inputs/outputs (nY0 and nY1)

文件：366.16 Kbytes 页数：25 Pages

NEXPERIA

安世