| 型号 | 下载 订购 | 功能描述 | 制造商 上传企业 | LOGO |
|---|---|---|---|---|
Johnson decade counter with 10 decoded outputs General description The 74HC4017-Q100; 74HCT4017-Q100 is a 5-stage Johnson decade counter with 10 decoded outputs (Q0 to Q9). It has an output from the most significant flip-flop (Q5-9), two clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). Either a LOW-to-HIGH tr 文件:757.55 Kbytes 页数:22 Pages | NEXPERIA 安世 | NEXPERIA | ||
Johnson decade counter with 10 decoded outputs GENERAL DESCRIPTION The 74HC/HCT4017 are high-speed Si-gate CMOS devices and are pin compatible with the “4017” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: standard • ICC category: MSI 文件:86.49 Kbytes 页数:12 Pages | PHI PHI | PHI | ||
Johnson decade counter with 10 decoded outputs General description The 74HC4017; 74HCT4017 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4017. The 74HC4017; 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded active HIGH outputs (Q0 to Q9), an active LOW output from the most significant flip-flop (Q5-9), act 文件:132.49 Kbytes 页数:23 Pages | 恩XP | 恩XP | ||
Johnson decade counter with 10 decoded outputs General description The 74HC4017; 74HCT4017 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4017. The 74HC4017; 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded active HIGH outputs (Q0 to Q9), an active LOW output from the most significant flip-flop (Q5-9), act 文件:132.49 Kbytes 页数:23 Pages | 恩XP | 恩XP | ||
Johnson decade counter with 10 decoded outputs 1. General description The 74HC4017; 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded outputs (Q0 to Q9), an output from the most significant flip-flop (Q5-9), two clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). The counter is advanced by either a 文件:310.09 Kbytes 页数:20 Pages | NEXPERIA 安世 | NEXPERIA | ||
Johnson decade counter with 10 decoded outputs GENERAL DESCRIPTION The 74HC/HCT4017 are high-speed Si-gate CMOS devices and are pin compatible with the “4017” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: standard • ICC category: MSI 文件:86.49 Kbytes 页数:12 Pages | PHI PHI | PHI | ||
Johnson decade counter with 10 decoded outputs General description The 74HC4017-Q100; 74HCT4017-Q100 is a 5-stage Johnson decade counter with 10 decoded outputs (Q0 to Q9). It has an output from the most significant flip-flop (Q5-9), two clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). Either a LOW-to-HIGH tr 文件:757.55 Kbytes 页数:22 Pages | NEXPERIA 安世 | NEXPERIA | ||
Johnson decade counter with 10 decoded outputs General description The 74HC4017-Q100; 74HCT4017-Q100 is a 5-stage Johnson decade counter with 10 decoded outputs (Q0 to Q9). It has an output from the most significant flip-flop (Q5-9), two clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). Either a LOW-to-HIGH tr 文件:757.55 Kbytes 页数:22 Pages | NEXPERIA 安世 | NEXPERIA | ||
Johnson decade counter with 10 decoded outputs The 74HC4017-Q100; 74HCT4017-Q100 is a 5-stage Johnson decade counter with 10 decoded outputs (Q0 to Q9). It has an output from the most significant flip-flop (Q5-9), two clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). Either a LOW-to-HIGH transition at CP0 while C • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from ‑40 °C to +85 °C and from ‑40 °C to +125 °C\n\n• Wide supply voltage range from 2.0 V to 6.0 V\n• Input levels:• For 74HC4017-Q100: CMOS level\n• For 74HCT4017-Q100: TTL level\n\n• Complies with JEDEC standard n; | Nexperia 安世 | Nexperia | ||
Johnson decade counter with 10 decoded outputs The 74HC4017; 74HCT4017 is a 5‑stage Johnson decade counter with 10 decoded outputs (Q0 to Q9), an output from the most significant flip‑flop (Q5‑9), two clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). The counter is advanced by either a LOW‑to‑HIGH transition at C • Wide supply voltage range from 2.0 V to 6.0 V\n• Input levels:• For 74HC4017: CMOS level\n• For 74HCT4017: TTL level\n\n• Complies with JEDEC standard no. 7 A\n• ESD protection:• HBM JESD22-A114E exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package options\n• Specified from -40°C; | Nexperia 安世 | Nexperia |
技术参数
- VCC (V):
2.0 - 6.0
- Output drive capability (mA):
± 5.2
- Logic switching levels:
CMOS
- tpd (ns):
18
- fmax (MHz):
77
- Power dissipation considerations:
low
- Tamb (°C):
-40~125
- Rth(j-a) (K/W):
90
- Ψth(j-top) (K/W):
11.8
- Rth(j-c) (K/W):
59
- Package name:
DHVQFN16
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
PHI |
00+/01+ |
SOP |
2115 |
全新原装100真实现货供应 |
询价 | ||
HAR |
24+ |
SOP |
122 |
询价 | |||
NEC |
17+ |
SOP |
9888 |
原装现货QQ:547425301手机17621633780杨小姐 |
询价 | ||
Nexperia |
24+ |
SO-16 |
30000 |
一级代理进口原装现货假一赔十 |
询价 | ||
RCA |
23+ |
SMD-SO16 |
9856 |
原装正品,假一罚百! |
询价 | ||
原装HARISS |
19+ |
SOP-16 |
20000 |
询价 | |||
原装HARISS |
24+ |
SOP-16 |
63200 |
一级代理/放心采购 |
询价 | ||
MOTOROLA/摩托罗拉 |
23+ |
50000 |
全新原装正品现货,支持订货 |
询价 | |||
TOSHIBA/东芝 |
23+ |
SOP16 |
770022 |
原厂授权代理,海外优势订货渠道。可提供大量库存,详 |
询价 | ||
NEC |
23+ |
SOP中体 |
20000 |
全新原装假一赔十 |
询价 |
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