Presettable synchronous 4-bit binary up/down counter

1. General description The 74HC193; 74HCT193 is a 4-bit synchronous binary up/down counter. Separate up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state synchronously with the LOW-to-HIGH transition of either clock input. If the CPU clock is pulsed while CPD i

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安世安世半导体(中国)有限公司

Presettable synchronous 4-bit binary up/down counter

General description The 74HC193; 74HCT193 is a 4-bit synchronous binary up/down counter. Separate up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state synchronously with the LOW-to-HIGH transition of either clock input. If the CPU clock is pulsed while CPD is hel

文件：157.98 Kbytes 页数：29 Pages

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Presettable synchronous 4-bit binary up/down counter

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恩XP

Presettable synchronous 4-bit binary up/down counter

1. General description The 74HC193-Q100; 74HCT193-Q100 is a 4-bit synchronous binary up/down counter. Separate up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state synchronously with the LOW-to-HIGH transition of either clock input. If the CPU clock is pulsed

文件：330.24 Kbytes 页数：24 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Presettable synchronous 4-bit binary up/down counter

文件：776.98 Kbytes 页数：29 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Presettable synchronous 4-bit binary up/down counter

The 74HC193; 74HCT193 is a 4-bit synchronous binary up/down counter. Separate up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state synchronously with the LOW-to-HIGH transition of either clock input. If the CPU clock is pulsed while CPD is held HIGH, the device will • Input levels:• For 74HC193: CMOS level\n• For 74HCT193: TTL level\n\n• Synchronous reversible 4-bit binary counting\n• Asynchronous parallel load\n• Asynchronous reset\n• Expandable without external logic\n• Complies with JEDEC standard no. 7A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n•;

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Presettable synchronous 4-bit binary up/down counter

The 74HC193-Q100; 74HCT193-Q100 is a 4-bit synchronous binary up/down counter. Separate up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state synchronously with the LOW-to-HIGH transition of either clock input. If the CPU clock is pulsed while CPD is held HIGH, the d • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Input levels:• For 74HC193-Q100: CMOS level\n• For 74HCT193-Q100: TTL level\n\n• Synchronous reversible 4-bit binary counting\n• Asynchronous parallel load\n• Asy;

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Package：16-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 计数器，除法器 描述：IC 4BIT BINARY UP/DN CNT 16TSSOP

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 计数器，除法器 描述：IC 4BIT BINARY UP/DN CNT 16TSSOP

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 计数器，除法器 描述：IC COUNTER U/D 4BIT BIN 16TSSOP

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司