Presettable synchronous 4-bit binary counter; synchronous reset

GENERAL DESCRIPTION The 74HC/HCT163 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT163 are synchronous presettable binary counters which feature an internal look-ahead carry

文件：86.73 Kbytes 页数：11 Pages

PHI

飞利浦

Presettable synchronous 4-bit binary counter; synchronous reset

1. General description The 74HC163; 74HCT163 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may b

文件：309.8 Kbytes 页数：20 Pages

NEXPERIA

安世

Presettable synchronous 4-bit binary counter; synchronous reset

1. General description The 74HC163-Q100; 74HCT163-Q100 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the coun

文件：292.9 Kbytes 页数：19 Pages

NEXPERIA

安世

Presettable synchronous 4-bit binary counter; synchronous reset

General description The 74HC163-Q100; 74HCT163-Q100 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters

文件：294.01 Kbytes 页数：19 Pages

NEXPERIA

安世

Presettable synchronous 4-bit binary counter; synchronous reset

The 74HC163; 74HCT163 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset to a HIGH or LOW. A • Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC163: CMOS level\n• For 74HCT163: TTL level\n\n• Synchronous counting and loading\n• 2 count enable inputs for n-bit cascading\n• Synchronous reset\n• Positive-edge triggered clock\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• M;

Nexperia

安世

Presettable synchronous 4-bit binary counter; synchronous reset

The 74HC163-Q100; 74HCT163-Q100 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset to a HIGH • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from ‑40 °C to +85 °C and from ‑40 °C to +125 °C\n\n• Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC163-Q100: CMOS level\n• For 74HCT163-Q100: TTL level\n\n• Synchronous counting and loading\n• 2 coun;

Nexperia

安世

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 计数器，除法器 描述：IC SYNC 4BIT BINAR COUNT 16TSSOP

Nexperia USA Inc.

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 计数器，除法器 描述：IC SYNC 4BIT BINAR COUNT 16TSSOP

Nexperia USA Inc.

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 计数器，除法器 描述：IC BINARY COUNTER SYNC 16TSSOP

Nexperia USA Inc.