Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

文件：271.41 Kbytes 页数：17 Pages

NEXPERIA

安世

Hex Schmitt?뭈rigger Inverter High?뭁erformance Silicon?묰ate CMOS

The 74HC14 is identical in pinout to the LS14, LS04 and the HC04. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC14 is useful to “square up” slow input rise and fall times. Due to hysteresis voltage of the Schmitt t

文件：133.46 Kbytes 页数：9 Pages

ONSEMI

安森美半导体

Hex Schmitt?뭈rigger Inverter High?뭁erformance Silicon?묰ate CMOS

The 74HC14 is identical in pinout to the LS14, LS04 and the HC04. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC14 is useful to “square up” slow input rise and fall times. Due to hysteresis voltage of the Schmitt t

文件：133.46 Kbytes 页数：9 Pages

ONSEMI

安森美半导体

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

文件：72.49 Kbytes 页数：8 Pages

PHI

PHI

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

文件：120.59 Kbytes 页数：23 Pages

PHI

PHI

Hex inverting Schmitt trigger

1. General description The 74HC14; 74HCT14 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to vol

文件：268.5 Kbytes 页数：16 Pages

NEXPERIA

安世

Hex inverting Schmitt trigger

1. General description The 74HC14; 74HCT14 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to vol

文件：268.5 Kbytes 页数：16 Pages

NEXPERIA

安世

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

文件：120.59 Kbytes 页数：23 Pages

PHI

PHI

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

文件：271.42 Kbytes 页数：17 Pages

NEXPERIA

安世

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

文件：271.41 Kbytes 页数：17 Pages

NEXPERIA

安世