Hex Schmitt-Trigger Inverter High-Performance Silicon-Gate CMOS

• Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS and TTL • Operating Voltage Range: 2 to 6V • Low Input Current: 1µA • High Noise Immunity Characteristic of CMOS Devices • In Compliance With the JEDEC Standard No. 7A Requirements • Chip Complexity: 60 FETs

文件：181.94 Kbytes 页数：8 Pages

MOTOROLA

摩托罗拉

CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC

Hex Schmitt Inverter The TC74HC14A is a high speed CMOS SCHMITT INVERTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Pin configuration and function are the same as the TC74HC04A

文件：241.21 Kbytes 页数：6 Pages

TOSHIBA

东芝

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

文件：120.59 Kbytes 页数：23 Pages

PHI

PHI

Hex inverting Schmitt trigger

1. General description The 74HC14; 74HCT14 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to vol

文件：268.5 Kbytes 页数：16 Pages

NEXPERIA

安世

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

文件：271.42 Kbytes 页数：17 Pages

NEXPERIA

安世

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

文件：271.41 Kbytes 页数：17 Pages

NEXPERIA

安世

Hex inverting Schmitt trigger

1. General description The 74HC14; 74HCT14 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to vol

文件：268.5 Kbytes 页数：16 Pages

NEXPERIA

安世

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

文件：120.59 Kbytes 页数：23 Pages

PHI

PHI

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

文件：120.59 Kbytes 页数：23 Pages

PHI

PHI

Hex inverting Schmitt trigger

1. General description The 74HC14-Q100; 74HCT14-Q100 is a hex inverter with Schmitt-trigger inputs. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inp

文件：271.42 Kbytes 页数：17 Pages

NEXPERIA

安世