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74HC109D

Dual JK flip-flop with set and reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT109 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT109 are dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP)

文件:65.67 Kbytes 页数:9 Pages

PHI

飞利浦

PHI

74HC109D

Dual JK flip-flop with set and reset; positive-edge-trigger

1. General description The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs and complementary Q and Q outputs. The set and reset are asynchronous active LOW inputs and operate independently of

文件:271.64 Kbytes 页数:16 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HC109DB

Dual JK flip-flop with set and reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT109 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT109 are dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP)

文件:65.67 Kbytes 页数:9 Pages

PHI

飞利浦

PHI

74HC109D-Q100

Dual JK flip-flop with set and reset; positive-edge-trigger

1. General description The 74HC109-Q100; 74HCT109-Q100 is a dual positive edge triggered JK flip-flop featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and

文件:257.709 Kbytes 页数:16 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HC109D-Q100

Dual JK flip-flop with set and reset; positive-edge-trigger

文件:799.3 Kbytes 页数:17 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HC109D

Dual JK flip-flop with set and reset; positive-edge-trigger

The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock i • Input levels:• For 74HC109: CMOS level\n• For 74HCT109: TTL level\n\n• J and K inputs for easy D-type flip-flop\n• Toggle flip-flop or \"do nothing\" mode\n• Specified in compliance with JEDEC standard no. 7A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n;

Nexperia

安世

74HC109DB

Dual JK flip-flop with set and reset; positive-edge-trigger

The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock i • Input levels:• For 74HC109: CMOS level\n• For 74HCT109: TTL level\n\n• J and K inputs for easy D-type flip-flop\n• Toggle flip-flop or \"do nothing\" mode\n• Specified in compliance with JEDEC standard no. 7A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n;

Nexperia

安世

74HC109D-Q100

Dual JK flip-flop with set and reset; positive-edge-trigger

The 74HC109-Q100; 74HCT109-Q100 is a dual positive edge triggered JK flip-flop featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of t • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Input levels:• For 74HC109-Q100: CMOS level\n• For 74HCT109-Q100: TTL level\n\n• J and K inputs for easy D-type flip-flop\n• Toggle flip-flop or \"do nothing\" mo;

Nexperia

安世

74HC109D,653

Package:16-SOIC(0.154",3.90mm 宽);包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 功能:设置(预设)和复位 类别:集成电路(IC) 触发器 描述:IC FF JK TYPE DUAL 1BIT 16SO

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

74HC109DB,112

Package:16-SSOP(0.209",5.30mm 宽);包装:管件 功能:设置(预设)和复位 类别:集成电路(IC) 触发器 描述:IC FF JK TYPE DUAL 1BIT 16SSOP

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

技术参数

  • VCC (V):

    2.0 - 6.0

  • Logic switching levels:

    CMOS

  • Output drive capability (mA):

    ± 5.2

  • tpd (ns):

    15

  • fmax (MHz):

    75

  • Power dissipation considerations:

    low

  • Tamb (°C):

    -40~125

  • Rth(j-a) (K/W):

    86

  • Ψth(j-top) (K/W):

    6.6

  • Rth(j-c) (K/W):

    44

  • Package name:

    SO16

供应商型号品牌批号封装库存备注价格
恩XP
24+
标准封装
17048
全新原装正品/价格优惠/质量保障
询价
NEXPERIA/安世
24+
sop
3580
原装现货/15年行业经验欢迎询价
询价
PHI
2021+
SOP16
9000
原装现货,随时欢迎询价
询价
Nexperia(安世)
2024
SOIC-16_150mil
174100
16余年资质 绝对原盒原盘代理渠道 更多数量
询价
PHI
24+
SOP
15
询价
PHIL
24+/25+
494
原装正品现货库存价优
询价
恩XP
16+
NA
8800
诚信经营
询价
ph
24+
N/A
6980
原装现货,可开13%税票
询价
PHI
25+
SOP3.9M
1370
百分百原装正品 真实公司现货库存 本公司只做原装 可
询价
REI
16+
原厂封装
10000
全新原装正品,代理优势渠道供应,欢迎来电咨询
询价
更多74HC109D供应商 更新时间2025-10-10 23:00:00