1. General description

The 74HC109-Q100; 74HCT109-Q100 is a dual positive edge triggered JK flip-flop featuring

individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and

complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and

operate independently of the clock input. The nJ and nK inputs control the state changes of the

flip-flops as described in the mode select function table. The nJ and nK inputs must be stable one

set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The JK design

allows operation as a D-type flip-flop by connecting the nJ and nK inputs together. Inputs include

clamp diodes. It enables the use of current limiting resistors to interface inputs to voltages in

excess of VCC.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall

times.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

• Automotive product qualification in accordance with AEC-Q100 (Grade 1)

• Specified from -40 °C to +85 °C and from -40 °C to +125 °C

• Input levels:

• For 74HC109-Q100: CMOS level

• For 74HCT109-Q100: TTL level

• J and K inputs for easy D-type flip-flop

• Toggle flip-flop or do nothing mode

• Specified in compliance with JEDEC standard no. 7A

• ESD protection:

• MIL-STD-883, method 3015 exceeds 2000 V

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

74HC109D-Q100属于集成电路（IC） > 触发器。安世半导体(中国)有限公司制造生产的74HC109D-Q100触发器触发器是能够存储单个逻辑状态或信息“位”的基本数字存储器件。这些器件至少有两个输入；一个或多个用于传递要存储的数据，另一个用于指示存储该数据的时间点。不同的触发器类型，例如 D（延迟）、SR（置位复位）和 JK，对提供给其输入的信号有不同的响应，可用于实现不同的逻辑功能。这些器件与锁存器的不同之处在于它们是边缘敏感器件，其保持的逻辑状态仅在接收到有效时钟信号时才会改变。