LOW-VOLTAGE 10-BIT BUS SWITCH

FEATURES: • 5Ω A/B bi-directional switch • Isolation under power-off conditions • Over-voltage tolerant • Latch-up performance exceeds 100mA • VCC = 2.3V - 3.6V, Normal Range • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • Available in QSOP and T

文件：254.81 Kbytes 页数：6 Pages

RENESAS

瑞萨

10-bit bus switch with output enable

1. General description The 74CBTLV3861 is a 10-bit bus switch with one output enable (OE) input. When OE is LOW, the switch is closed and port A is connected to the B port. When OE is HIGH, the switch is disabled. To ensure the high-impedance OFF-state during power-up or power-down, OE should b

文件：286.26 Kbytes 页数：15 Pages

NEXPERIA

安世

10-bit bus switch with output enable

文件：165.08 Kbytes 页数：18 Pages

恩XP

Low-Voltage 10-Bit Bus Switch

The 74CBTLV3861 10-bit bus switch provides high-speed bus switching with low on-state resistance of the switch allowing connections to be made with minimal propagation delay. The 74CBTLV3861 operates at -40C to +85C 5 ohm A/B bi-directional switch\nIsolation under power-off conditions\nOver-voltage tolerant\nLatch-up performance exceeds 100mA\nVCC = 2.3V - 3.6V, Normal Range\nESD > 2000V per MIL-STD-883, Method 3015\n> 200V using machine model (C = 200pF, R = 0)\nAvailable in 24 pin QSOP and TSSOP packages;

Renesas

瑞萨

10-bit bus switch with output enable

1. General description The 74CBTLV3861 is a 10-bit bus switch with one output enable (OE) input. When OE is LOW, the switch is closed and port A is connected to the B port. When OE is HIGH, the switch is disabled. To ensure the high-impedance OFF-state during power-up or power-down, OE should b

文件：286.26 Kbytes 页数：15 Pages

NEXPERIA

安世

丝印：CL861；Package：TVSOP(DGV)；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：698.2 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CL861；Package：TVSOP(DGV)；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：698.2 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CL861；Package：TVSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH

5-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II description/ordering information The SN74CBTLV3861 pr

文件：697.46 Kbytes 页数：19 Pages

TI

德州仪器

10-bit bus switch with output enable

1. General description The 74CBTLV3861 is a 10-bit bus switch with one output enable (OE) input. When OE is LOW, the switch is closed and port A is connected to the B port. When OE is HIGH, the switch is disabled. To ensure the high-impedance OFF-state during power-up or power-down, OE should b

文件：286.26 Kbytes 页数：15 Pages

NEXPERIA

安世

10-bit bus switch with output enable

文件：165.08 Kbytes 页数：18 Pages

PHI

PHI