Low-power dual 2-input AND gate

1. General description The 74AUP2G08 is a dual 2-input AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device i

文件：292.24 Kbytes 页数：19 Pages

NEXPERIA

安世

Low-power dual 2-input AND gate

文件：146.35 Kbytes 页数：21 Pages

PHI

飞利浦

DUAL AND GATE

文件：255.77 Kbytes 页数：9 Pages

DIODES

美台半导体

Low-power dual 2-input AND gate

文件：100.32 Kbytes 页数：17 Pages

恩XP

Dual AND Gate

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G08 is a dual two input AND gate. Both gates have push-pull outputs designed for operation over a power supply range of 0.8 V to 3.6 V. The device is fully spe

Diodes

美台半导体

丝印：p08；Package：SOT765-1；Low-power dual 2-input AND gate

1. General description The 74AUP2G08 is a dual 2-input AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device i

文件：292.24 Kbytes 页数：19 Pages

NEXPERIA

安世

丝印：p08；Package：SOT902-2；Low-power dual 2-input AND gate

1. General description The 74AUP2G08 is a dual 2-input AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device i

文件：292.24 Kbytes 页数：19 Pages

NEXPERIA

安世

丝印：pE；Package：SOT1116；Low-power dual 2-input AND gate

1. General description The 74AUP2G08 is a dual 2-input AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device i

文件：292.24 Kbytes 页数：19 Pages

NEXPERIA

安世

丝印：pE；Package：SOT1203；Low-power dual 2-input AND gate

1. General description The 74AUP2G08 is a dual 2-input AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device i

文件：292.24 Kbytes 页数：19 Pages

NEXPERIA

安世

丝印：p08；Package：SOT833-1；Low-power dual 2-input AND gate

1. General description The 74AUP2G08 is a dual 2-input AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device i

文件：292.24 Kbytes 页数：19 Pages

NEXPERIA

安世