Low-power 2-input OR-gate

文件：349.84 Kbytes 页数：21 Pages

恩XP

Low-power 2-input OR-gate

文件：349.84 Kbytes 页数：21 Pages

恩XP

Low-power 2-input OR-gate

文件：349.84 Kbytes 页数：21 Pages

恩XP

Low-power 2-input OR gate

文件：83.51 Kbytes 页数：16 Pages

PHI

PHI

丝印：pG；Package：TSSOP5；Low-power 2-input OR-gate

文件：227.57 Kbytes 页数：14 Pages

NEXPERIA

安世

Low-power 2-input OR-gate

文件：349.84 Kbytes 页数：21 Pages

恩XP

Low-power 2-input OR-gate

文件：227.57 Kbytes 页数：14 Pages

NEXPERIA

安世

Low-power 3-input OR-AND gate

The 74AUP1G3208 provides the Boolean function: Y = (A + B) × C. The user can choose the logic functions OR, AND and OR-AND. All inputs can be connected to VCC or GND.\n Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range • Wide supply voltage range from 0.8 V to 3.6 V\n• High noise immunity\n• Complies with JEDEC standards:• JESD8-12 (0.8 V to 1.3 V)\n• JESD8-11 (0.9 V to 1.65 V)\n• JESD8-7 (1.2 V to 1.95 V)\n• JESD8-5 (1.8 V to 2.7 V)\n• JESD8-B (2.7 V to 3.6 V)\n\n• ESD protection:• HBM JESD22-A114F Class 3A excee;

Nexperia

安世

Low-power 3-input OR-AND gate

The 74AUP1G3208 provides the Boolean function: Y = (A + B) × C. The user can choose the logic functions OR, AND and OR-AND. All inputs can be connected to VCC or GND.\n Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range • Wide supply voltage range from 0.8 V to 3.6 V\n• High noise immunity\n• Complies with JEDEC standards:• JESD8-12 (0.8 V to 1.3 V)\n• JESD8-11 (0.9 V to 1.65 V)\n• JESD8-7 (1.2 V to 1.95 V)\n• JESD8-5 (1.8 V to 2.7 V)\n• JESD8-B (2.7 V to 3.6 V)\n\n• ESD protection:• HBM JESD22-A114F Class 3A excee;

Nexperia

安世

Package：6-XFDFN；包装：卷带（TR） 类别：集成电路（IC） 门和反相器 - 多功能，可配置 描述：IC 3-IN OR-AND GATE LP 6-XSON

Nexperia USA Inc.