Low-power 2-input AND gate with open-drain

1. General description The 74AUP1G09 is a single 2-input AND gate with open-drain output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V

文件：262.53 Kbytes 页数：17 Pages

NEXPERIA

安世

SINGLE 2 INPUT POSITIVE AND GATE WITH OPEN DRAIN OUTPUT

文件：202.87 Kbytes 页数：11 Pages

DIODES

美台半导体

Low-power 2-input AND gate with open-drain

文件：90.97 Kbytes 页数：15 Pages

恩XP

Single-gate

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.\n\nThe AUP1G09 is a single AND gate with an open drain output designed for operation over a power supply range of 0.8V to 3.6V.\nThe device is fully specified for partia •Advanced Ultra Low Power (AUP) CMOS•Supply Voltage Range from 0.8V to 3.6V•4mA Output Drive at 3.0V•Low Static power consumption;

Diodes

美台半导体

丝印：P9；Package：SOT886；Low-power 2-input AND gate with open-drain

1. General description The 74AUP1G09 is a single 2-input AND gate with open-drain output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V

文件：262.53 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：P9；Package：SOT1115；Low-power 2-input AND gate with open-drain

1. General description The 74AUP1G09 is a single 2-input AND gate with open-drain output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V

文件：262.53 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：P9；Package：SOT1202；Low-power 2-input AND gate with open-drain

1. General description The 74AUP1G09 is a single 2-input AND gate with open-drain output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V

文件：262.53 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：P9；Package：SOT353-1；Low-power 2-input AND gate with open-drain

1. General description The 74AUP1G09 is a single 2-input AND gate with open-drain output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V

文件：262.53 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：p9；Package：TSSOP5；Low-power 2-input AND gate with open-drain

1. General description The 74AUP1G09-Q100 is a single 2-input AND gate with open-drain output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from

文件：214.98 Kbytes 页数：12 Pages

NEXPERIA

安世

丝印：p9；Package：TSSOP5；Low-power 2-input AND gate with open-drain

1. General description The 74AUP1G09-Q100 is a single 2-input AND gate with open-drain output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from

文件：235.92 Kbytes 页数：13 Pages

NEXPERIA

安世