SINGLE 2-INPUT NAND GATE

Features « Wide supply voltage range from 0.8V to 3.6V « Inputs accept voltages up to 3.6V o lorr Supports partial-power-down mode « Low static power consumption; lcc=0.5pA (Max.) » ESD Protection Exceeds JESD 22 -2000-V Human-Body Model (A114-A) -200-V Machine Model (A115-A) -1000-V Charg

文件：4.9761 Mbytes 页数：9 Pages

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丝印：PA；Package：TSSOP5；Low-power 2-input NAND gate

1. General description The 74AUP1G00 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device

文件：274.25 Kbytes 页数：18 Pages

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丝印：pA；Package：TSSOP5；Low-power 2-input NAND gate

1. General description The 74AUP1G00-Q100 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This d

文件：229.27 Kbytes 页数：14 Pages

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安世

丝印：pA；Package：TSSOP5；Low-power 2-input NAND gate

1. General description The 74AUP1G00-Q100 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This d

文件：248.01 Kbytes 页数：14 Pages

NEXPERIA

安世

SINGLE 2-INPUT NAND GATE

Features « Wide supply voltage range from 0.8V to 3.6V « Inputs accept voltages up to 3.6V o lorr Supports partial-power-down mode « Low static power consumption; lcc=0.5pA (Max.) » ESD Protection Exceeds JESD 22 -2000-V Human-Body Model (A114-A) -200-V Machine Model (A115-A) -1000-V Charg

文件：4.9761 Mbytes 页数：9 Pages

TECHPUBLIC

台舟电子

丝印：PA；Package：X2SON5；Low-power 2-input NAND gate

1. General description The 74AUP1G00 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device

文件：274.25 Kbytes 页数：18 Pages

NEXPERIA

安世

丝印：pA；Package：XSON5；Low-power 2-input NAND gate

1. General description The 74AUP1G00-Q100 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This d

文件：248.01 Kbytes 页数：14 Pages

NEXPERIA

安世

Low-power 2-input NAND gate

1. General description The 74AUP1G00-Q100 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This d

文件：248.01 Kbytes 页数：14 Pages

NEXPERIA

安世

Low-power 2-input NAND gate

1. General description The 74AUP1G00-Q100 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This d

文件：229.27 Kbytes 页数：14 Pages

NEXPERIA

安世

Low-power 2-input NAND gate

1. General description The 74AUP1G00-Q100 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This d

文件：248.01 Kbytes 页数：14 Pages

NEXPERIA

安世