丝印：PA；Package：SOT883；PNP general purpose transistor

FEATURES •Leadless ultra small plastic package (1 mm × 0.6 mm × 0.5 mm) •Board space 1.3 mm × 0.9 mm •Power dissipation comparable to SOT23.

文件：325.51 Kbytes 页数：9 Pages

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丝印：PA；Package：SOT883；PNP general purpose transistor

FEATURES •Leadless ultra small plastic package (1 mm × 0.6 mm × 0.5 mm) •Board space 1.3 mm × 0.9 mm •Power dissipation comparable to SOT23. APPLICATIONS •General purpose small signal DC •Low and medium frequency AC applications •Mobile communications, digital (still) cameras, PDAs, PCMCIA

文件：325.5 Kbytes 页数：9 Pages

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丝印：PA；Package：XSON6；Low-power 2-input NAND gate

1. General description The 74AUP1G00 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device

文件：274.25 Kbytes 页数：18 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：PA；Package：XSON6；Low-power 2-input NAND gate

1. General description The 74AUP1G00 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device

文件：274.25 Kbytes 页数：18 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：PA；Package：XSON6；Low-power 2-input NAND gate

1. General description The 74AUP1G00 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device

文件：274.25 Kbytes 页数：18 Pages

NEXPERIANexperia B.V. All rights reserved

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丝印：PA；Package：TSSOP5；Low-power 2-input NAND gate

1. General description The 74AUP1G00 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device

文件：274.25 Kbytes 页数：18 Pages

NEXPERIANexperia B.V. All rights reserved

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丝印：pA；Package：TSSOP5；Low-power 2-input NAND gate

1. General description The 74AUP1G00-Q100 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This d

文件：229.27 Kbytes 页数：14 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：pA；Package：TSSOP5；Low-power 2-input NAND gate

1. General description The 74AUP1G00-Q100 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This d

文件：248.01 Kbytes 页数：14 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：PA；Package：X2SON5；Low-power 2-input NAND gate

1. General description The 74AUP1G00 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device

文件：274.25 Kbytes 页数：18 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

丝印：pA；Package：XSON5；Low-power 2-input NAND gate

1. General description The 74AUP1G00-Q100 is a single 2-input NAND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This d

文件：248.01 Kbytes 页数：14 Pages

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司