16-bit registered transceiver; 3-state

The 74ALVCH16952 consists of two sections, each containing a dual octal non-inverting registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Data applied to the inputs is entered and stored on the rising edge of the clock (nCPA • CMOS low-power consumption\n• Multibyte flow-through pinout architecture\n• Low inductance, multiple center power and ground pins for minimum noise and ground bounce\n• Direct interface with TTL levels\n• Output drive capability 50 Ω transmission lines at 85 °C\n• Complies with JEDEC standard JESD;

Nexperia

安世

Package：56-TFSOP（0.240"，6.10mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC TXRX NON-INVERT 3.6V 56TSSOP

Nexperia USA Inc.

Package：56-TFSOP（0.240"，6.10mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC TXRX NON-INVERT 3.6V 56TSSOP

Nexperia USA Inc.

Package：56-BSSOP（0.295"，7.50mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC TXRX NON-INVERT 3.6V 56SSOP

TI

德州仪器