16-bit bus transceiver/register 3-State

DESCRIPTION The 74ALVCH16646 consists of 16 non-inverting bus transceiver circuits with 3-State outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the internal registers. FEATURES • Complies with JEDEC standard no. 8-1A • CMOS low

文件：92.33 Kbytes 页数：12 Pages

PHI

飞利浦

16-bit bus transceiver/register; 3-state

1. General description The 74ALVCH16646 consists of 16 non-inverting bus transceiver circuits with 3-state outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the internal registers. Data on the ‘A’ or ‘B’ bus will be clocked in the inter

文件：250.76 Kbytes 页数：17 Pages

NEXPERIA

安世

丝印：ALVCH16646；Package：TSSOP；16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) · Latch-Up Performance Exceeds 250 mA Per JESD 17

文件：780.12 Kbytes 页数：25 Pages

TI

德州仪器

16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

文件：397.91 Kbytes 页数：18 Pages

TI

德州仪器

16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

文件：397.91 Kbytes 页数：18 Pages

TI

德州仪器

16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

文件：397.91 Kbytes 页数：18 Pages

TI

德州仪器

16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

文件：397.91 Kbytes 页数：18 Pages

TI

德州仪器

16-bit bus transceiver/register; 3-state

The 74ALVCH16646 consists of 16 non-inverting bus transceiver circuits with 3-state outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the internal registers. Data on the ‘A’ or ‘B’ bus will be clocked in the internal registers, as the approp • Wide supply voltage range of 2.3 V to 3.6 V\n• CMOS low power consumption\n• Direct interface with TTL levels\n• Current drive ±24 mA at VCC = 3.0 V.\n• MULTIBYTE flow-through standard pin-out architecture\n• Low inductance multiple VCC and GND pins for minimize noise and ground bounce\n• All data;

Nexperia

安世

Package：56-TFSOP（0.240"，6.10mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC TXRX NON-INVERT 3.6V 56TSSOP

TI2

德州仪器

Package：56-TFSOP（0.240"，6.10mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC TXRX NON-INVERT 3.6V 56TSSOP

NEXPERIA

安世