Octal D-type flip-flop with data enable; positive-edge trigger

DESCRIPTION The 74AHC/AHCT377 D-type flip-flops are high-speed silicon-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT377 devices have eight edge-triggered, D-type flip-flops with individual

文件：101.48 Kbytes 页数：20 Pages

PHI

PHI

Octal D-type flip-flop with data enable; positive-edge trigger

1. General description The 74AHC377; 74AHCT377 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC377; 74AHCT377 has eight edge-triggered, D-type flip-flops with individual D inputs

文件：601.79 Kbytes 页数：16 Pages

NEXPERIA

安世

Octal D-type flip-flop with data enable; positive-edge trigger

文件：100.98 Kbytes 页数：16 Pages

恩XP

Octal D-type flip-flop with data enable; positive-edge trigger

文件：744.74 Kbytes 页数：17 Pages

NEXPERIA

安世

Octal D-type flip-flop with data enable; positive-edge trigger

The 74AHC377; 74AHCT377 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC377; 74AHCT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. A common • Balanced propagation delays\n• All inputs have Schmitt-trigger actions\n• Inputs accept voltages higher than VCC\n• Ideal for addressable register applications\n• Data enable for address and data synchronization\n• Eight positive-edge triggered D-type flip-flops\n• Input levels:• For 74AHC377: CMO;

Nexperia

安世

Octal D-type flip-flop with data enable; positive-edge trigger

The 74AHC377-Q100; 74AHCT377-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC377-Q100; 74AHCT377-Q100 has eight edge-triggered, D-type flip-flops with individual D inputs and Q out • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from ‑40 °C to +85 °C and from ‑40 °C to +125 °C\n\n• Balanced propagation delays\n• All inputs have Schmitt-trigger actions\n• Inputs accept voltages higher than VCC\n• Ideal for addressable register applications\n•;

Nexperia

安世

Package：20-TSSOP（0.173"，4.40mm 宽）；包装：管件 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 8BIT 20TSSOP

Nexperia USA Inc.

Package：20-TSSOP（0.173"，4.40mm 宽）；包装：管件 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 8BIT 20TSSOP

Nexperia USA Inc.

Package：20-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT） 功能：标准 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 8BIT 20TSSOP

Nexperia USA Inc.