Quad 2-input multiplexer

DESCRIPTION The 74AHC/AHCT157 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V

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PHI

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Quad 2-input multiplexer

General description The 74AHC/AHCT157 are high-speed Si-gate CMOS devices and are pin compatible with Low Power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. Features ■ Balanced propagation delays ■ All inputs have a Schmitt-trigger action ■ Inputs accep

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恩XP

Quad 2-input multiplexer

1. General description The 74AHC/AHCT157 are high-speed Si-gate CMOS devices and are pin compatible with Low Power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74AHC/AHCT157 are quad 2-input multiplexer which select 4 bits of data from two sources unde

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Quad 2-input multiplexer

DESCRIPTION The 74AHC/AHCT157 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V

文件：84.52 Kbytes 页数：16 Pages

PHI

PHI

Quad 2-input multiplexer

1. General description The 74AHC/AHCT157-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low Power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74AHC/AHCT157-Q100 are quad 2-input multiplexer which select 4 bits of data from two so

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Automotive product qualification in accordance with AEC-Q100

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NEXPERIA

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Quad 2-input multiplexer

The 74AHC/AHCT157 are high-speed Si-gate CMOS devices and are pin compatible with Low Power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.\n The 74AHC/AHCT157 are quad 2-input multiplexer which select 4 bits of data from two sources under the control of a commo • Balanced propagation delays\n• All inputs have a Schmitt-trigger action\n• Inputs accepts voltages higher than VCC\n• Multiple input enable for easy expansion\n• Ideal for memory chip select decoding\n• For 74AHC157 only: operates with CMOS input levels\n• For 74AHCT157 only: operates with TTL inp;

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Quad 2-input multiplexer

The 74AHC157-Q100; 74AHCT157-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A.\n The 74AHC157-Q100; 74AHCT157-Q100 is a quad 2-input multiplexer which selects 4 bits of data from two source • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40°C to +85°C and from -40°C to +125°C\n\n• Balanced propagation delays\n• All inputs have a Schmitt-trigger action\n• Inputs accept voltages higher than VCC\n• Multiple input enable for easy expansion\n• Ideal;

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Package：16-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC MULTIPLEXER 4 X 2:1 16TSSOP

Nexperia USA Inc.

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 信号开关，多路复用器，解码器 描述：IC MULTIPLEXER 4 X 2:1 16TSSOP

Nexperia USA Inc.