74AHC126PW

Quad buffer/line driver; 3-state

1.Generaldescription The74AHC126;74AHCT126isaquadbuffer/linedriverwith3-stateoutputscontrolledbythe outputenableinputs(nOE).ALOWonnOEcausestheoutputstoassumeahigh-impedance OFF-state.Inputsareovervoltagetolerant.Thisfeatureallowstheuseofthesedevicesas

74AHC126PW

Quad buffer/line driver; 3-state

DESCRIPTION The74AHC/AHCT126arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardNo.7A. FEATURES •ESDprotection: HBMEIA/JESD22-A114-Aexceeds2000V MMEIA/JESD22-A115-Aexceeds200V

PHI

74AHC126PW

Quad buffer/line driver; 3-state

The 74AHC126; 74AHCT126 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC126; 74AHCT126 provides four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY; • Balanced propagation delays\n• All inputs have Schmitt-trigger action\n• Inputs accept voltages higher than VCC\n• Input levels:• For 74AHC126: CMOS level\n• For 74AHCT126: TTL level\n\n• ESD protection:• HBM JESD22-A114E exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n• CDM JESD22-C101C exceeds;

74AHC126PW

Quad buffer/line driver; 3-state

恩XP

74AHC126PWDH

Quad buffer/line driver; 3-state

DESCRIPTION The74AHC/AHCT126arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardNo.7A. FEATURES •ESDprotection: HBMEIA/JESD22-A114-Aexceeds2000V MMEIA/JESD22-A115-Aexceeds200V

PHI

74AHC126PW-Q100

Quad buffer/line driver; 3-state

The 74AHC126-Q100; 74AHCT126-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A.\n The 74AHC126-Q100; 74AHCT126-Q100 provides four non-inverting buffer/line drivers with 3-state outputs. The ; • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Balanced propagation delays\n• All inputs have Schmitt trigger action\n• Inputs accept voltages higher than VCC\n• Input levels:• For 74AHC126-Q100: CMOS level\n•;

74AHC126PW-Q100

Quad buffer/line driver; 3-state

74AHC126PW,112

Package：14-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC BUF NON-INVERT 5.5V 14TSSOP

74AHC126PW,118

Package：14-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC BUF NON-INVERT 5.5V 14TSSOP

74AHC126PW-Q100,11

Package：14-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC BUF NON-INVERT 5.5V 14TSSOP