Quad 2-input NOR gate

DESCRIPTION The 74AHC/AHCT02 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT02 provides the Quad 2-input OR function. FEATURES • ESD protection: HBM EIA/JESD22-A114-

文件：74.48 Kbytes 页数：16 Pages

PHI

PHI

Quad 2-input NOR gate

General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. The 74AHC02; 74AHCT02 provides the quad 2-input NOR function. Features ■ Balanced propagation d

文件：84.42 Kbytes 页数：13 Pages

恩XP

Quad 2-input NOR gate

General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. The 74AHC02; 74AHCT02 provides the quad 2-input NOR function. Features ■ Balanced propagation d

文件：94 Kbytes 页数：14 Pages

恩XP

Quad 2-input NOR gate

1. General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC02; 74AHCT02 provides a quad 2-input NOR function. 2. Features and benefits • Balance

文件：225.55 Kbytes 页数：12 Pages

NEXPERIA

安世

四路 2 输入正或非门

74AHC02 是一款四路 2 输入正或非门。其电源电压范围为 2.0V 至 5.5V。该器件以正逻辑实现布尔函数 Y = A × B 或 Y = A+B。\n74AHC02 采用绿色 TSSOP-14、SOIC-14 和 TQFN-2.5×3-14L 封装，工作环境温度范围为 -40℃ 至 +125℃。 • 宽电源电压范围：2.0V 至 5.5V\n• 输入接受高于电源电压且最高可达 5.5V 的电压\n• +8mA/-8mA 输出电流\n• 低功耗：ICC = 0.1µA（典型值）\n• -40℃ 至 +125℃ 工作温度范围\n• 采用绿色 TSSOP-14、SOIC-14 和 TQFN-2.5×3-14L 封装;

SGMICRO

圣邦股份

Quad 2-input NOR gate

General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. The 74AHC02; 74AHCT02 provides the quad 2-input NOR function. Features ■ Balanced propagation d

文件：84.42 Kbytes 页数：13 Pages

恩XP

Quad 2-input NOR gate

1. General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC02; 74AHCT02 provides a quad 2-input NOR function. 2. Features and benefits • Balance

文件：225.55 Kbytes 页数：12 Pages

NEXPERIA

安世

Quad 2-input NOR gate

General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. The 74AHC02; 74AHCT02 provides the quad 2-input NOR function. Features ■ Balanced propagation d

文件：94 Kbytes 页数：14 Pages

恩XP

Quad 2-input NOR gate

1. General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC02; 74AHCT02 provides a quad 2-input NOR function. 2. Features and benefits • Balance

文件：225.55 Kbytes 页数：12 Pages

NEXPERIA

安世

Quad 2-input NOR gate

General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. The 74AHC02; 74AHCT02 provides the quad 2-input NOR function. Features ■ Balanced propagation d

文件：84.42 Kbytes 页数：13 Pages

恩XP