QUAD 2-INPUT AND GATE

DESCRIPTION The 74ACT08 is an advanced high-speed CMOS QUAD 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. ■ HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C ■ COMPATIBLE WITH TTL OUTPUTS VIH

文件：173.26 Kbytes 页数：8 Pages

STMICROELECTRONICS

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Quad 2-Input AND Gate

General Description The AC/ACT08 contains four, 2-input AND gates. Features ■ ICC reduced by 50 on 74AC only ■ Outputs source/sink 24 mA

文件：87.12 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Quad 2-Input AND Gate

General Description The AC/ACT08 contains four, 2-input AND gates. Features ■ ICC reduced by 50 on 74AC only ■ Outputs source/sink 24 mA

文件：87.12 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Quad 2-Input AND Gate

General Description The AC/ACT08 contains four, 2-input AND gates. Features ■ ICC reduced by 50 on 74AC only ■ Outputs source/sink 24 mA

文件：87.12 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Quad 2-Input AND Gate

General Description The AC/ACT08 contains four, 2-input AND gates. Features ■ ICC reduced by 50 on 74AC only ■ Outputs source/sink 24 mA

文件：87.12 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Quad 2-Input AND Gate

General Description The AC/ACT08 contains four, 2-input AND gates. Features ■ ICC reduced by 50 on 74AC only ■ Outputs source/sink 24 mA

文件：87.12 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Quad 2-Input AND Gate

General Description The AC/ACT08 contains four, 2-input AND gates. Features ■ ICC reduced by 50 on 74AC only ■ Outputs source/sink 24 mA

文件：87.12 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

QUAD 2-INPUT AND GATE

DESCRIPTION The 74ACT08 is an advanced high-speed CMOS QUAD 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. ■ HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C ■ COMPATIBLE WITH TTL OUTPUTS VIH

文件：173.26 Kbytes 页数：8 Pages

STMICROELECTRONICS

意法半导体

TRIPLE 3-INPUT NAND GATE

DESCRIPTION The 74ACT10 is an advanced high-speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. The d

文件：67.36 Kbytes 页数：7 Pages

STMICROELECTRONICS

意法半导体

Dual JK Positive Edge-Triggered Flip-Flop

General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti

文件：100.04 Kbytes 页数：9 Pages

FAIRCHILD

仙童半导体