OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12

文件：412.15 Kbytes 页数：15 Pages

TI

德州仪器

OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

文件：91.95 Kbytes 页数：6 Pages

TI

德州仪器

OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

文件：796.99 Kbytes 页数：14 Pages

TI

德州仪器

具有三态输出的 8 通道、3V 至 5.5V 缓冲器

The 74AC11244 is an octal buffer or line driver designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as two 4-bit buffers or one 8-bit buffer, with active-low output-ena • EPICTM (Enhanced-Performance Implanted CMOS ) 1-um Process \n• 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers\n• Flow-Through Architecture Optimizes PCB Layout\n• Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise\n• 500-mA Typical Latch-Up Immunity a;

TI

德州仪器

丝印：AE244；Package：SSOP；OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12

文件：412.15 Kbytes 页数：15 Pages

TI

德州仪器

丝印：AE244；Package：SSOP；OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12

文件：412.15 Kbytes 页数：15 Pages

TI

德州仪器

丝印：AC11244；Package：SOIC；OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12

文件：412.15 Kbytes 页数：15 Pages

TI

德州仪器

丝印：AC11244；Package：SOIC；OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12

文件：412.15 Kbytes 页数：15 Pages

TI

德州仪器

丝印：AC11244；Package：SOIC；OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12

文件：412.15 Kbytes 页数：15 Pages

TI

德州仪器

丝印：AE244；Package：TSSOP；OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12

文件：412.15 Kbytes 页数：15 Pages

TI

德州仪器