丝印：5962-9074801MSA；Package：CFP；OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers P-N-P Inputs Reduce DC Loading Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs) ESD Protection Exceeds J

文件：766.08 Kbytes 页数：18 Pages

TI

德州仪器

丝印：5962-9074801MSA；Package：CFP；OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers P-N-P Inputs Reduce DC Loading Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs) ESD Protection Exceeds J

文件：766.08 Kbytes 页数：18 Pages

TI

德州仪器

丝印：5962-9074801MSA；Package：CFP；OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers P-N-P Inputs Reduce DC Loading Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs) ESD Protection Exceeds J

文件：766.08 Kbytes 页数：18 Pages

TI

德州仪器

丝印：5962-9074801MSA；Package：CFP；OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers P-N-P Inputs Reduce DC Loading Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs) ESD Protection Exceeds J

文件：766.08 Kbytes 页数：18 Pages

TI

德州仪器

OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

文件：1.20352 Mbytes 页数：17 Pages

TI

德州仪器