丝印：320AIC11I；Package：TQFP；General-Purpose Low-Voltage 1.1 V to 3.6 V I/O 16-Bit 22.KSPS DSP CODEC

1.1 Features • 16-bit oversampling sigma-delta A/D converter • 16-bit oversampling sigma-delta D/A converter • Maximum output conversion rate: – 22 ksps with on-chip FIR filter – 88 ksps with FIR bypassed • Voiceband bandwidth in FIR-bypassed mode and final sampling rate at 8 ksps – 90-dB S

文件：345.42 Kbytes 页数：57 Pages

TI

德州仪器

丝印：320AIC12C；Package：TSSOP(DBT)；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件：2.12866 Mbytes 页数：66 Pages

TI

德州仪器

丝印：320AIC12C；Package：TSSOP(DBT)；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件：2.12866 Mbytes 页数：66 Pages

TI

德州仪器

丝印：320AIC12I；Package：TSSOP(DBT)；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件：2.12866 Mbytes 页数：66 Pages

TI

德州仪器

丝印：320AIC12I；Package：TSSOP(DBT)；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件：2.12866 Mbytes 页数：66 Pages

TI

德州仪器

丝印：320AIC12I；Package：TSSOP(DBT)；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件：2.12866 Mbytes 页数：66 Pages

TI

德州仪器

丝印：320AIC12I；Package：TSSOP(DBT)；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件：2.12866 Mbytes 页数：66 Pages

TI

德州仪器

丝印：320AIC12I；Package：TSSOP(DBT)；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件：2.12866 Mbytes 页数：66 Pages

TI

德州仪器

丝印：320AIC12I；Package：TSSOP(DBT)；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

文件：2.12866 Mbytes 页数：66 Pages

TI

德州仪器

丝印：320AIC13I；Package：TSSOP；SMARTDM™ Low-Power, Low-Voltage, 1.1-V to 3.6-V 1/0, 16-Bit, 26-KSPS Codec

1.1 Description The TLV320AIC13 implements the smart time division multiplexed serial port (SMARTDM). This design innovation optimizes the DSP performance with an advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontrollers. The S

文件：693.16 Kbytes 页数：56 Pages

TI

德州仪器