ZL40264中文资料1:4 Individual Output Enable Buffer数据手册Microchip规格书

描述 Description

The ZL40264 is part of a family of high-performance, ultra-low jitter and low power PCIe Gen 1 to 6, Intel QPI fanout buffers with individual output enable pins. Using the 4 output ZL40264 and utilizing the individual output pin, you can create hot-swappable PCIe clocktrees. Applications include PCI Express generation 1/2/3/4/5/6 clock distribution, Intel QPI and UPI distribution, Servers, storage and data centers, switches and routers.

特性 Features

PCIe Gen 1.0 to 6.0 Compliant
One differential input that accepts any differential format.
Two (ZL40262)/Four(ZL40264) differential HCSL outputs
Ultra-low additive jitter: 24 fs (in 12 kHz to 20 MHz integration band at 100 MHz clock frequency)
Supports clock frequencies from 0 to 400 MHz
Supports 2.5V or 3.3V power supplies for HCSL outputs
Embedded Low Drop Out (LDO) Voltage regulator provides superior power supply noise rejection
Maximum output to output skew of 40 ps
Individual output-enable pin for each differential pair
Transparent for spread-spectrum clock

简介

ZL40264属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的ZL40264时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。