ZL40216中文资料1:6 LVDS Buffer数据手册Microchip规格书

描述 Description

The ZL40216 is an LVDS clock fanout buffer with six identical output clock drivers capable of operating at frequencies up to 750MHz.Inputs to the ZL40216 are externally terminated to allow use of precision termination components and to allow full flexibility of input termination. The ZL40216 can accept DC coupled LVPECL or LVDS and AC coupled LVPECL, LVDS, CML or HCSL input signals; single ended input signals can also be accepted. A pin compatible device with internal termination is also available.The ZL40216 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.

特性 Features

Low additive jitter of 104 fs RMS
Accepts differential or single-ended input: LVPECL, LVDS, CML, HCSL, LVCMOS
Six precision LVDS outputs
Operating frequency up to 750 MHz
Option for 2.5 V or 3.3 V power supply with current consumption of 93 mA
On-chip Low Drop Out (LDO) Regulator for superior power supply noise rejection

简介

ZL40216属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的ZL40216时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。