ZL40210中文资料2:8 LVPECL Buffer with Glitch-free Switching数据手册Microchip规格书

描述 Description

The ZL40210 is an LVPECL clock fanout buffer with eight output clock drivers capable of operating at frequenciesup to 750MHz.The ZL40210 is designed to fan out low-jitter reference clocks for wired or optical communications applicationswhile adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitorsminimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Itsoperation is guaranteed over the industrial temperature range -40°C to +85°C.

特性 Features

Ultra low additive jitter of 121 fs RMS
Accepts two differential or single-ended inputs: LVPECL, LVDS, CML, HCSL, LVCMOS
Glitch-free switching of references
Eight precision LVPECL outputs. Operating frequency up to 750 MHz
Options for 2.5 V or 3.3 V power supply with core current consumption of 122 mA
On-chip Low Drop Out (LDO) Regulator for superior power supply rejection

简介

ZL40210属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的ZL40210时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。