ZL40240数据手册集成电路（IC）的时钟缓冲器驱动器规格书PDF

描述 Description

The ZL40240 is a programmable or hardware pin controlled low additive jitter, low power 3 x 10 LVCMOS fanout buffer. Two inputs can accept signal in differential (LVPECL, SSTL, LVDS, HSTL, CML ) or single ended (LVPECL or LVCMOS) format and the third input can accept a single ended signal or it can be used to build a crystal oscillator by connecting an external crystal resonator between its XIN and XOUT pins. All the other components for building crystal oscillator are built in device such as load capacitance, series and shunt resistors.The ZL40240 has ten LVCMOS outputs which can be powered from 3.3V, 2.5V, 1.8V or 1.5V supply. Each output can be independently enabled/disabled via SPI bus. In addition, the strength of each output can be programmed.The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.

特性 Features

3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL,CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal
Ten 1.5V/1.8V/2.5V/3.3V LVCMOS outputs
Supports frequencies from 0 to 250MHz
Ultra-low system level additive jitter: 17fs (12kHz to 20MHz)
Ultra-low noise floor of -170dBc/Hz
Supports crystals from 8MHz to 160MHz
Supports 2.5V or 3.3V power supplies
Output to output skew of 30ps (typical)
Input to output delay of 2ns (typical)
SPI or Hardware control

简介

ZL40240属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的ZL40240时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。