ZL40231中文资料Precision 1:10 Low Skew/Low Jitter Buffer数据手册Microchip规格书

描述 Description

The ZL40231 is a low additive jitter, low power 3 x 10 LVPECL/HCSL/LVDS fanout buffer.Two inputs can accept signal in differential (LVPECL, SSTL, LVDS, HSTL, CML ) or single ended (LVPECL or LVCMOS) format and the third input can accept a single ended signal or it can be used to build a crystal oscillator by connecting an external crystal resonator between its XIN and XOUT pins.The ZL40231 has ten LVPECL/HCSL/LVDS outputs which can be powered from 3.3V or 2.5V supply. Each output bank (A and B) can be independently set to be LVPECL, LVDS, HCSL or Hi-Z via control OUTA/B_TYPE_SEL0/1 pins.The control inputs: OUTA/B_TYPE_SEL0/1 and IN_SEL0/1 have low input threshold voltage so they can be driven from a device with low I/O voltage (down to 1.2V).

特性 Features

3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal
Ten differential LVPECL/LVDS/HCSL outputs
One LVCMOS output
Ultra-low additive jitter: 24fs (integration band: 12kHz to 20MHz at 625MHz clock frequency)
Supports clock frequencies from 0 to 1.6GHz
Supports 2.5V or 3.3V power supplies on LVPECL,LVDS or HCSL outputs
Supports 1.5V, 1.8V, 2.5V or 3.3V on LVCMOS outputs
Embedded Low Drop Out (LDO) Voltage regulator provides superior Power Supply Noise Rejection
Maximum output to output skew of 40ps
Device controlled via control pins

简介

ZL40231属于集成电路（IC）的时钟缓冲器驱动器。由制造生产的ZL40231时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。