256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4

文件：853.33 Kbytes 页数：52 Pages

MOSEL

茂矽电子

256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4

文件：853.33 Kbytes 页数：52 Pages

MOSEL

茂矽电子

256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4

文件：853.33 Kbytes 页数：52 Pages

MOSEL

茂矽电子

256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4

文件：853.33 Kbytes 页数：52 Pages

MOSEL

茂矽电子

256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4

文件：853.33 Kbytes 页数：52 Pages

MOSEL

茂矽电子

256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4

文件：853.33 Kbytes 页数：52 Pages

MOSEL

茂矽电子

256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4

Description\nThe V54C3256(16/80/40)4V(T/S/B) is a four bank Synchronous DRAM organized as 4 banks x 4Mbit x 16, 4 banks x 8Mbit x 8, or 4 banks x 16Mbit x 4. The V54C3256(16/80/40)4V(T/S/B) achieves high speed data transfer rates up to 166 MHz by employing a chip architecture that prefetches multi p ■ 4 banks x 4Mbit x 16 organization\n■ 4 banks x 8Mbit x 8 organization\n■ 4 banks x16Mbit x 4 organization\n■ High speed data transfer rates up to 166 MHz\n■ Full Synchronous Dynamic RAM, with all signals referenced to clock rising edge\n■ Single Pulsed RAS Interface\n■ Data Mask for Read/Write Con;

Mosel

茂矽电子

3.3V, 2K refresh ultra-high performance 1M x 16 SDRAM 2 banks x 512Kbit x 16

Mosel

茂矽电子