200/183/166 MHz 3.3 VOLT ULTRA HIGH PERFORMANCE 1M X 32 SDRAM 2 BANKS X 512Kbit X 32

Description The V54C333322V is a 33,554,432 bits synchronous high data rate DRAM organized as 2 x 524,288 words by 32 bits. The device is designed to comply with JEDEC standards set for synchronous DRAM products, both electrically and mechanically. Synchronous design allows precise cycle control

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MOSEL

茂矽电子

200/183/166 MHz 3.3 VOLT ULTRA HIGH PERFORMANCE 1M X 32 SDRAM 2 BANKS X 512Kbit X 32

Mosel

茂矽电子

SMD

KET

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