200/183/166/143 MHz 3.3 VOLT ULTRA HIGH PERFORMANCE 2M X 32 SDRAM 4 BANKS X 512Kbit X 32

Description The V54C365324V is a 67,108, 864 bits synchronous high data rate DRAM organized as 4 x 524,288 words by 32 bits. The device is designed to comply with JEDEC standards set for synchronous DRAM products, both electrically and mechanically. Synchronous design allows precise cycle control

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MOSEL

茂矽电子

200/183/166/143 MHz 3.3 VOLT ULTRA HIGH PERFORMANCE 2M X 32 SDRAM 4 BANKS X 512Kbit X 32

Mosel

茂矽电子

3.3V ultra high performance 2M x 32 SDRAM 4 banks x 512Kbit x 32

Mosel

茂矽电子

SMD

KET

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