TDA3中文资料ADAS 应用处理器数据手册TI规格书

描述 Description

TI’s TDA3x System-on-Chip (SoC) is a highly optimized and scalable family of devicesdesigned to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA3xfamily enables broad ADAS applications in automobiles by integrating an optimal mix of performance,low power, smaller form factor and ADAS vision analytics processing that aims to facilitate a moreautonomous and collision-free driving experience.
The TDA3x SoC enables sophisticated embedded vision technology in today’s automobile byenabling the industry’s broadest range of ADAS applications including front camera, rear camera,surround view, radar, and fusion on a single architecture.
The TDA3x SoC incorporates a heterogeneous, scalable architecture that includes a mixof TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, VisionAccelerationPac (EVE), and dual-Cortex-M4 processors. The device allows low power profile indifferent package options (including Package-On-Package) to enable small form factor designs. TDA3xSoC also integrates a host of peripherals including multi-camera interfaces (both parallel andserial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB.
The Vision AccelerationPac for this family of products includes embedded vision engine(EVE) offloading the vision analytics functionality from the application processor while alsoreducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a32-bit RISC core for efficient program execution and a vector coprocessor for specialized visionprocessing.
Additionally, Texas Instruments provides a complete set of development tools for theArm, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplifyprogramming and scheduling, and a debugging interface for visibility into source codeexecution.
The TDA3x ADAS processor is qualified according to AEC-Q100 standard.

特性 Features

• Architecture Designed for ADAS Applications
• Full-HD Video (1920 × 1080p, 60 fps)
• Up to 2 C66x Floating-Point VLIW DSP
• Fully Object-Code Compatible With C67x and C64x+
• Up to Thirty-two 16 × 16-Bit Fixed-Point Multiplies per Cycle
• Up to 512kB of On-Chip L3 RAM
• Memory Interface (EMIF) Module
• Supports DDR3/DDR3L up to DDR-1066
• Supports DDR2 up to DDR-800
• Up to 2GB Supported
• Vision AccelerationPac
• Embedded VisionEngine (EVE)
• Display Subsystem
• Display Controller With DMA Engine
• Video Input Port (VIP) Module
• Support for up to 4 MultiplexedInput Ports
• On-chip Temperature Sensor That is Capable of Generating Temperature Alerts
• General-Purpose Memory Controller (GPMC)
• Enhanced Direct Memory Access (EDMA) Controller
• 3-Port (2 External) Gigabit Ethernet (GMAC) Switch
• Controller Area Network (DCAN) Module
• CAN 2.0BProtocol
• Modular Controller Area Network (MCAN) Module
• CAN 2.0B Protocol
• Eight 32-Bit General-Purpose Timers
• Three Configurable UART Modules
• Four Multichannel Serial Peripheral Interfaces (McSPI)
• Two Inter-Integrated Circuit (I2C) Ports
• Three Multichannel Audio Serial Port (McASP) Modules
• MultiMedia Card/Secure Digital/Secure Digital Input Output Interface (MMC™/SD™/SDIO)
• Power, Reset, and Clock Management
• On-Chip Debug With CTools Technology
• 15 × 15mm, 0.65-mm Pitch, 367-Pin PBGA (ABF)
• Memory Cyclic Redundancy Check (CRC)
• Error Signaling Module (ESM)
• 8-Channel 10-bit ADC
• PWMSS
• WDR, HW LDC and Perspective

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