TDA2EG数据手册集成电路（IC）的专用IC规格书PDF

描述 Description

TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.
The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.
The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, ARM Cortex-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.
Additionally, TI provides a complete set of development tools for the ARM and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.
The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.

特性 Features

·Architecture Designed for ADAS Applications
·Video, Image, and Graphics ProcessingSupport·Full-HD Video (1920 × 1080p, 60 fps)
·Multiple Video Input and Video Output
·ARM® Cortex®-A15 Microprocessor Subsystem
·C66x Floating-Point VLIW DSP·Fully Object-Code Compatible With C67x and C64x+
·Up to Thirty-two 16 × 16-Bit Fixed-Point Multiplies per Cycle

·Up to 512KB of On-Chip L3 RAM
·Level 3 (L3) and Level 4 (L4)Interconnects
· DDR3/DDR3L Memory Interface (EMIF)Module·Supports up to DDR3-1333 (667 MHz)
·Up to 2GB Across Single Chip Select
·Dual ARM®Cortex®-M4 Image Processing Units (IPU)
·IVA-HD Subsystem
·DisplaySubsystem·Display Controller With DMA Engine and up to Three Pipelines
·HDMI™ Encoder: HDMI 1.4a and DVI 1.0 Compliant
· Single-Core PowerVR® SGX544 3DGPU
·2D-Graphics Accelerator (BB2D) Subsystem·Vivante™ GC320 Core
·Video Processing Engine (VPE)
·One Video Input Port (VIP) Module·Support for up to Four Multiplexed Input Ports
·General-Purpose Memory Controller (GPMC)
·Enhanced Direct Memory Access (EDMA) Controller
·2-Port Gigabit Ethernet (GMAC)·Up to Two External Ports, One Internal

·Sixteen 32-Bit General-Purpose Timers
· 32-Bit MPU Watchdog Timer
·Six High-Speed Inter-Integrated Circuit (I2C)Ports
·TenConfigurable UART/IrDA/CIR Modules
·Four Multichannel Serial Peripheral Interfaces (McSPI)
·QuadSPI Interface (QSPI)
·SATA Interface
· Eight Multichannel Audio Serial Port (McASP)Modules
·SuperSpeed USB 3.0 Dual-Role Device
·High-Speed USB2.0 Dual-Role Device
·High-Speed USB 2.0 On-The-Go
·Four MultiMedia Card/Secure Digital/Secure Digital InputOutput Interfaces (MMC/SD/SDIO)
· PCI Express® 3.0 Port With IntegratedPHY·One 2-lane Gen2-Compliant Port
·or Two 1-lane Gen2-Compliant Ports

·Dual Controller Area Network (DCAN)Modules·CAN 2.0B Protocol
·MIPI CSI-2Camera Serial Interface
·Up to 215General-Purpose I/O (GPIO) Pins
·Real-Time Clock Subsystem (RTCSS)
·Device Security Features·Hardware Crypto Accelerators and DMA
·Firewalls
·JTAG Lock
·Secure Keys
·Secure ROM and Boot
·Power,Reset, and Clock Management
·On-Chip Debug With CTools Technology
·28-nm CMOSTechnology
· 23 mm × 23 mm, 0.8-mm Pitch, 760-Pin BGA (ABC)