TDA2E-17数据手册TI中文资料规格书

描述 Description

TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family ofdevices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). TheTDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mixof performance, low power, and ADAS vision analytics processing that aims to facilitate a moreautonomous and collision-free driving experience.
The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobileby enabling a board range of ADAS applications including park assist, surround view and sensorfusion on a single architecture.
The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mixof TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, ArmCortex-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator fordecoding multiple video streams over an Ethernet AVB network, along with graphics accelerator forrendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host ofperipherals including multicamera interfaces (both parallel and serial, including CSI-2) to enableEthernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.
Additionally, TI provides a complete set of development tools for the Arm and DSP,including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and adebugging interface for visibility into source code execution.
Cryptographic acceleration is available in all devices. All other supported securityfeatures, including support for secure boot, debug security and support for trusted executionenvironment are available on High-Security (HS) devices. For more information about HS devices,contact your TI representative.
The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.
TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devicesdesigned to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Exfamily enables broad ADAS applications in today’s automobile by integrating an optimal mix ofperformance, low power, and ADAS vision analytics processing that aims to facilitate a moreautonomous and collision-free driving experience.
The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile byenabling a board range of ADAS applications including park assist, surround view and sensor fusionon a single architecture.
The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix ofTI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, ArmCortex-A15 MPCore and dual-Cortex-M4 processors. The integration of a video accelerator fordecoding multiple video streams over an Ethernet AVB network, along with graphics accelerator forrendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host ofperipherals including multicamera interfaces (both parallel and serial, including CSI-2) to enableEthernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.
Additionally, TI provides a complete set of development tools for the Arm and DSP,including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and adebugging interface for visibility into source code execution.
Cryptographic acceleration is available in all devices. All other supported securityfeatures, including support for secure boot, debug security and support for trusted executionenvironment are available on High-Security (HS) devices. For more information about HS devices,contact your TI representative.
The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.

特性 Features

• Architecture Designed for ADAS Applications
• Video, Image, and Graphics Processing Support
• Full-HD Video (1920 × 1080p, 60fps)
• Multiple Video Input and VideoOutput

• Arm® Cortex®-A15 Microprocessor Subsystem

• C66x Floating-Point VLIW DSP
• Fully Object-Code Compatible With C67x and C64x+

• Up to Thirty-two 16 × 16-Bit Fixed-Point Multiplies per Cycle

• Up to 512KB of On-Chip L3 RAM
• Level 3 (L3) and Level 4 (L4) Interconnects
• DDR3/DDR3L Memory Interface (EMIF) Module
• Supports up to DDR-1333 (667 MHz)
• Up to 2GBAcross Single Chip Select

• Dual Arm® Cortex®-M4 Image Processing Units (IPU)
• IVA-HD Subsystem
• Display Subsystem
• Display Controller With DMAEngine and Up to Three Pipelines
• HDMI™ Encoder: HDMI 1.4a and DVI 1.0Compliant

• Single-Core PowerVR® SGX544 3D GPU
• 2D-Graphics Accelerator (BB2D) Subsystem
• Vivante® GC320Core

• Video Processing Engine (VPE)

• One Video Input Port (VIP) Module
• Support for up to FourMultiplexed Input Ports


• General-Purpose Memory Controller (GPMC)

• Enhanced Direct Memory Access (EDMA) Controller

• 2-Port Gigabit Ethernet (GMAC)
• Up to Two External Ports, One Internal

• Sixteen 32-Bit General-Purpose Timers

• 32-Bit MPU Watchdog Timer

• Six High-Speed Inter-Integrated Circuit (I2C) Ports
• Ten Configurable UART/IrDA/CIR Modules

• Four Multichannel Serial Peripheral Interfaces (McSPI)
• Quad SPI Interface (QSPI)

• Eight Multichannel Audio Serial Port (McASP) Modules
• SuperSpeed USB 3.0 Dual-Role Device
• High-Speed USB 2.0 Dual-Role Device
• High-Speed USB 2.0 On-The-Go

• Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD®/SDIO)
• PCI Express® 3.0 Port With Integrated PHY
• One 2-lane Gen2-Compliant Port
• or Two 1-laneGen2-Compliant Ports
• Dual Controller Area Network (DCAN) Modules
• CAN 2.0BProtocol

• MIPI® CSI-2 Camera Serial Interface
• Up to 186 General-Purpose I/O (GPIO) Pins

• Device Security Features
• Hardware Crypto Accelerators andDMA
• Firewalls
• JTAG Lock
• SecureKeys
• Secure ROM and Boot
• Customer Programmable Keys

• Power, Reset, and Clock Management

• On-Chip Debug With CTools Technology
• 28-nm CMOS Technology

• 17 mm × 17 mm, 0.65-mm Pitch, 538-Pin BGA (CBD)
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