TC5118165BJ中文资料东芝数据手册PDF规格书

Description

The TC5118165BJ/BFT is the hyper page (EDO) dynamic RAM organized 1,048,576 words by 16 bits. The TC5118165BJ/

BFT utilizes Toshiba's CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operat-

ing margins, both internaily and to the system user. Multiplexed address inputs permit the TC5118165BJ/BFT to be pack-

aged in a standard 42 pin plastic SOJ and 50/44 pin plastic TSOP. The package size provides high system bit densities and

is compatible with widely available automated testing and insertion equipment. System oriented features include single

power supply of 5V±10 tolerance, direct interfacing capability with high performance logic families such as Schottky TTL.

Features

1,048,576 word by 16 bit organization

• Fast access time and cycle time

Single power supply of 5V±10 with a built-in VBB generator

• Low Power

990mW MAX. Operating

(TC5118165BJ/BFT-60)

825mW MAX. Operating

(TC5118165BJ/BFT-70)

5.5mW MAX. Standby

• Outputs unlatched at cycle end allows two-dimensional chip

selection

• Read-Modify-Write, CAS before RAS refresh,

RAS-only refresh, Hidden refresh, Hyper Page

Mode (EDO) and Test Mode capability

All inputs and outputs TTL compatible

1024 refresh cycles/16ms

Package

TC5118165BJ:

SOJ42-P-400

TC5118165BFT: TSOP50-P-400

Note: For packaging details see Mechanical Dimensions section.