SY10E451数据手册集成电路（IC）的触发器规格书PDF

描述 Description

The SY10/100E451 offer six D-type flip-flops with single ended outputs and differential data and clock inputs, designed for use in new, high-performance ECL systems.The registers are triggered by the rising edge of the CLK input. A logic HIGH on the Master Reset (MR) input resets all outputs to a logic LOW. The VBB output is provided for use as a reference voltage for single-ended reception of ECL signals to that device only. When used for this purpose, it is recommended that VBB is decoupled to VCC via a 0.01µF capacitor.

特性 Features

·1100MHz min. toggle frequency
·Extended 100E VEE range of -4.2V to -5.5V
·Differential inputs: data and clock
·VBB output for single-ended use
·Asynchronous Master Reset
·Fully compatible with industry standard 10KH, 100K ECL levels
·Internal 75KΩ input pulldown resistors
·Fully compatible with Motorola MC10E/100E451
·Available in 28-pin PLCC package

简介

SY10E451属于集成电路（IC）的触发器。由制造生产的SY10E451触发器触发器是能够存储单个逻辑状态或信息“位”的基本数字存储器件。这些器件至少有两个输入；一个或多个用于传递要存储的数据，另一个用于指示存储该数据的时间点。不同的触发器类型，例如 D（延迟）、SR（置位复位）和 JK，对提供给其输入的信号有不同的响应，可用于实现不同的逻辑功能。这些器件与锁存器的不同之处在于它们是边缘敏感器件，其保持的逻辑状态仅在接收到有效时钟信号时才会改变。