SAA7182WP中文资料飞利浦数据手册PDF规格书

GENERAL DESCRIPTION

The SAA7182; SAA7183 encodes digital YUV video data to an NTSC, PAL, SECAM CVBS or S-Video signal and also RGB.

The circuit accepts CCIR compatible YUV data with 720 active pixels per line in 4 : 2 : 2 multiplexed formats, for example MPEG decoded data. It includes a sync/clock generator and on-chip Digital-to-Analog Converters (DACs).

The circuit is compatible to the DIG-TV2 chip family.

FEATURES

• CMOS 5 V device

• Digital PAL/NTSC/SECAM encoder

• System pixel frequency 13.5 MHz

• Accepts MPEG decoded data on 8-bit wide input port. Input data format Cb, Y, Cr etc. or Y and Cb, Cr on 16 lines (“CCIR 656”)

• Three DACs for CVBS, Y and C operating at 27 MHz with 10-bit resolution

• Three DACs for RGB operating at 27 MHz with 9-bit resolution, RGB sync on CVBS and Y

• CVBS, Y, C and RGB output simultaneously

• Closed captioning and teletext encoding including sequencer and filter

• On-chip YUV to RGB matrix

• Fast I2C-bus control port (400 kHz)

• Encoder can be master or slave

• Programmable horizontal and vertical input synchronization phase

• Programmable horizontal sync output phase

• Internal Colour Bar Generator (CBG)

• Overlay with Look-Up Tables (LUTs) 8 × 3 bytes

• Macrovision Pay-per-View protection system as option, also used for RGB output