SAA7182AWP中文资料飞利浦数据手册PDF规格书

FEATURES

• CMOS circuit to enhance video data and to convert luminance and colour-difference signals from digital-to-analog

• Digital Colour Transient Improvement block (DCTI) to increase the sharpness of colour transitions. The improved pin-compatible SAA7165 can supersede the SAA9065

• 16-bit parallel input for 4 : 1 : 1 and 4 : 2 : 2 YUV data

• Data clock input LLC (Line-Locked Clock) for a data rate up to 36 MHz

• 8-bit luminance and 8-bit multiplexed colour-difference formats (7-bit formats optional)

• MC input to support various clock and pixel rates

• Formatting YUV input data; 4 : 2 : 2 format, 4 : 1 : 1 format and filter characteristics selectable

• HREF input to determine the active line (number of pixels)

• Controllable peaking of luminance signal

• Coring stage with controllable threshold to eliminate noise in luminance signal

• Interpolation filter suitable for both formats to increase the data rate in chrominance path

• Polarity of colour-difference signals selectable

• All functions controlled via I2C-bus

• Separate digital-to-analog converters (9-bit resolution for Y; 8-bit for colour-difference signals)

• 1 V (p-p)/75 Ω outputs realized by two resistors

• No external adjustments.